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PDF AT29C512-12PI Data sheet ( Hoja de datos )
| Número de pieza | AT29C512-12PI | |
| Descripción | 512K 64K x 8 5-volt Only CMOS Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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AT29C512
Features
Fast Read Access Time - 70 ns
• 5-Volt-Only Reprogramming
•• Sector Program Operation
Single Cycle Reprogram (Erase and Program)
512 Sectors (128 bytes/sector)
Internal Address and Data Latches for 128-Bytes
Internal Program Control and Timer
• Hardware and Software Data Protection
• Fast Sector Program Cycle Time - 10 ms
• DATA Polling for End of Program Detection
•• Low Power Dissipation
50 mA Active Current
100 µA CMOS Standby Current
Typical Endurance > 10,000 Cycles
•• Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
•• Commercial and Industrial Temperature Ranges
512K (64K x 8)
5-volt Only
CMOS Flash
Memory
Description
The AT29C512 is a 5-volt-only in-system Flash programmable and erasable read only
memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Manu-
factured with Atmel’s advanced nonvolatile CMOS technology, the device offers ac-
cess times to 70 ns with power dissipation of just 275 mW over the commercial tem-
perature range. When the device is deselected, the CMOS standby current is less
than 100 µA. The device endurance is such that any sector can typically be written to
in excess of 10,000 times.
DIP Top View
(continued)
Pin Configurations
Pin Name Function
A0 - A15 Addresses
CE Chip Enable
OE Output Enable
WE Write Enable
I/O0 - I/O7 Data Inputs/Outputs
NC No Connect
AT29C512
PLCC Top View
TSOP Top View
Type 1
0456B
4-117
1 page  
AT29C512
AC Read Characteristics
Symbol
tACC
tCE (1)
tOE (2)
tDF (3, 4)
tOH
Parameter
Address to Output
Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output
Float
Output Hold from
OE, CE or Address,
whichever occurred
first
AT29C512-70
Min Max
70
70
0 35
0 25
0
AC Read Waveforms (1, 2, 3, 4)
AT29C512-90
Min Max
90
90
0 40
0 25
0
AT29C512-12
Min Max
120
120
0 50
0 30
0
AT29C512-15
Min Max Units
150 ns
150 ns
0 70 ns
0 40 ns
0 ns
Notes: 1. CE may be delayed up to tACC - tCE after the address
transition without impact on tACC .
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE or by tACC - tOE
after an address change without impact on tACC .
Input Test Waveforms and
Measurement Level
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
Output Test Load
70 ns
90/120/150 ns
tR, tF < 5 ns
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ Max
CIN 4 6
COUT
8 12
Notes: 1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V
4-121
5 Page 
AT29C512
4-127
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AT29C512-12PI.PDF ] | |
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