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PDF AN8041S Data sheet ( Hoja de datos )
| Número de pieza | AN8041S | |
| Descripción | Liquid crystal backlight control IC | |
| Fabricantes | Panasonic Semiconductor | |
| Logotipo |  |
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Voltage Regulators
AN8041S
Liquid crystal backlight control IC
s Overview
The AN8041S is an inverter control IC for liquid
crystal backlight using PWM method. The output
voltage of DC-DC converter and the current of cath-
ode-ray tube can be controlled by using two error
amplifiers, so that the system is designed easily.
Since the n-channel MOSFET can be directly
driven, it is possible to construct a highly effective
power supply.
10.1±0.3
16
9
18
Unit: mm
0.3 (0° to 10°)
s Features
• Operating supply voltage: 3.6 V to 34 V *
• Totem pole output circuit: Output current of ±500 mA
• Built-in bootstrap circuit
(0.605)
1.27
Seating plane
0.40±0.25
• N-channel power MOSFET can be directly driven
• Built-in two error amplifier circuits allow both the
SOP016-P-0225A
voltage and current control
• Incorporating on/off functions (active-high control input, standby mode current is 5 µA or less)
• Built-in timer latch short-circuit protection circuit
• Maximum oscillation frequency: 500 kHz
Note) *: The voltage is limited to the range of 3.6 V to 17 V if used in a step-down circuit.
Seating plane
s Applications
• LCD displays, digital still cameras, and PDAs
s Block Diagram
Off 16
VREF
2.57 V
On/off
active-high
RQ
S U.V.L.O. Q
S.C.P. 5
R
Latch Q
S
Constant
current source
OSC
PWM comp.
Bootstrap
14 CB
13 Out
S.C.P.
comp.
Error amp. 1
Error amp. 2
8 FB1
6 IN+1
7 IN−1
9 FB2
11 IN+2
10 IN−2
1
1 page  
Voltage Regulators
AN8041S
s Terminal Equivalent Circuits (continued)
Pin No.
4
VREF
Equivalent circuit
PWM
comparator
input
4 IDTC
CDTC
RT
RDTC
5
VREF
ICHG
To U.V.L.O.
Latch
S
Q
0.75 V R
5
6
VREF
7
76
8 VREF
Source current
8
Sink current
9 VREF
Source current
9
Sink current
Description
DTC:
The terminal for connecting a resistor and ca-
pacitor to set the dead-time and soft start period
of PWM output. Input current IDTC is determined
by the timing resistor RT , so that dispersion and
fluctuation with temperature are suppressed. It
is approx. −12.3 µA when RT = 15 kΩ.
IDTC =
VRT
RT
×
1
2
[A]
S.C.P.:
The terminal for connecting a capacitor to set the
time constant of soft start and timer latch short-
circuit protection circuit.
Use a capacitance value in the range of more than
1 000 pF.
The charge current ICHG is determined by the
timing resistor RT , so that dispersion and fluc-
tuation with temperature are suppressed. It is
approx. −1.3 µA when RT = 15 kΩ.
ICHG =
VRT
RT
×
1
11
[A]
IN+1:
The noninverted input terminal of the error am-
plifier 1.
For common-mode input, use in the range of
− 0.1 V to +0.8 V.
IN−1:
The inverted input terminal of the error ampli-
fier 1.
For common-mode input, use in the range of
− 0.1 V to +0.8 V.
FB1:
The output terminal of the error amplifier 1.
Source current : approx. −120 µA
Sink current : approx. 8 mA
Correct the frequency characteristics of the gain
and the phase by connecting a resistor and a ca-
pacitor between this terminal and IN−1 terminal.
FB2:
The output terminal of the error amplifier 2.
Source current : approx. −120 µA
Sink current : approx. 8 mA
Correct the frequency characteristics of the gain
and the phase by connecting a resistor and a ca-
pacitor between this terminal and IN−2 terminal.
I/O
I
I
O
O
5
5 Page 
Voltage Regulators
AN8041S
s Application Note (continued)
[3] Function descriptions (continued)
4. Timer latch short-circuit protection circuit
When the short-circuit or overload of the power supply output continues for a certain period, this circuit
prevents the parts such as external main switch device, flywheel diode, the choke coil from destruction or deterioration.
The short-circuit protection circuit is shown in figure 4. The timer latch short-circuit protection circuit detects
the output level of the error amplifier 1 and 2 blocks. When either the DC-DC converter output voltage or the lamp
current detection voltage is stable, the output of that error amplifier is stabilized and the short-circuit protection
comparator also maintains balance.
When the load conditions are suddenly changed, and both of the outputs of the error amplifier 1 block and 2
block (FB1, FB2) become 1.82 V or higher, the short-circuit protection comparator outputs low-level and cut off
the transistor Q1, thereby the external capacitor CS of the S.C.P. terminal (pin 5) starts charging with current ICHG
given by the following equation:
VPE = VSTBY + ICHG ×
tPE
CS
[V]
0.75 V = 0.03 V + ICHG ×
tPE
CS
CS = ICHG ×
tPE
0.72
[F]
ICHG is constant current which is determined by the timing resistor RT of the oscillator. It becomes approximately
2.3 µA when RT = 15 kΩ.
ICHG =
VRT × 1
RT × 11
[A]
When the external capacitor CS is charged to approximately 0.75 V, the latch circuit is set to fix the totem pole
output terminal to low-level and sets the dead-time to 100%.
When the latch circuit is set, the S.C.P. terminal voltage is discharged to approximately 30 mV. However, once
the latch circuit is set, it is not reset unless the power supply is turned off.
IN+1
IN−1
FB1
6 Error amp. 1
7
8
IN+2
IN−2
FB2
11 Error amp. 2
10
9
ICHG
SQ
VREF
S.C.P. comp.
R Q Output cut-off
Q1 Latch
1.82 V
Q2
S.C.P. CS
Figure 4. Short-circuit protection circuit
5. Low input voltage malfunction prevention circuit (U.V.L.O.)
When the supply voltage is dropped under the transient condition such as power-on or operation stop, this
circuit protects the system from destruction or deterioration due to the malfunction of the control circuit.
This circuit detects the internal reference voltage which varies according to the supply voltage level. During
the period from the time when the supply voltage starts to rise and to the time when it reaches 3.1 V, it keeps the dead-
time of the Out terminal (pin 13) to 100% and maintains the DTC terminal (pin 4) and the S.C.P. terminal (pin 5) at
low-level. When the supply voltage falls, it holds the hysteresis width of 140 mV and operates at a voltage under
2.96 V.
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet AN8041S.PDF ] | |
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