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PDF LTC1657LI Data sheet ( Hoja de datos )
| Número de pieza | LTC1657LI | |
| Descripción | Parallel 16-Bit Rail-to-Rail Micropower DAC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s 16-Bit Monotonic Over Temperature
s 3V Single Supply Operation
s Deglitched Rail-to-Rail Voltage Output: 8nV • s
s ICC: 650µA Typ
s Maximum DNL Error: ±1LSB
s Settling Time: 20µs to ±1LSB
s Internal or External Reference
s Internal Power-On Reset to 0V
s Asynchronous CLR Pin
s Output Buffer Configurable for Gain of 1 or 2
s Parallel 16-Bit or 2-Byte Double Buffered Interface
s Narrow 28-Lead SSOP Package
s 5V Version Available (LTC1657)
U
APPLICATIONS
s Instrumentation
s Industrial Process Control
s Automatic Test Equipment
s Communication Test Equipment
Final Electrical Specifications
LTC1657L
Parallel 16-Bit Rail-to-Rail
Micropower DAC
DESCRIPTION
April 2000
The LTC®1657L is a complete single supply, rail-to-rail
voltage output, 16-bit digital-to-analog converter (DAC) in
a 28-pin SSOP or PDIP package. It includes a rail-to-rail
output buffer amplifier, an internal 1.25V reference and a
double buffered parallel digital interface.
The LTC1657L operates from a 2.7V to 5.5V supply. It has
a separate reference input pin that can be driven by an
external reference. The full-scale output can be 1 or 2
times the reference voltage depending on how the X1/X2
pin is connected.
The LTC1657L is similar to Linear Technology Corporation’s
LTC1450 12-bit VOUT DAC family allowing an easy up-
grade path. It is the only buffered 16-bit parallel DAC in a
28-lead SSOP package and includes an onboard reference
for stand alone performance.
, LTC and LT are registered trademarks of Linear Technology Corporation.
BLOCK DIAGRA
DATA IN FROM
MICROPROCESSOR
DATA BUS
FROM
MICROPROCESSOR
DECODE LOGIC
FROM
SYSTEM RESET
19 D15 (MSB)
18
17
16
15
14
13
12
D8
11 D7
10
9
8
7
6
5
4 D0 (LSB)
3 CSMSB
1 WR
2 CSLSB
28 LDAC
27 CLR
MSB
8-BIT
INPUT
REGISTER
LSB
8-BIT
INPUT
REGISTER
23
REFOUT
REFERENCE
1.25V
22
REFHI
2.7V TO 5.5V
24
VCC
16-BIT
DAC
REGISTER
16-BIT
DAC
+
–
R
R
VOUT 25 0V TO
2.5V
POWER-ON
RESET
GND
20
REFLO X1/X2
21 26
1657 TA01
Differential Nonlinearity
vs Input Code
1.0
0.8
0.6
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
– 1.0
0
16484
32768
CODE
49152 65535
1657 TA02
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
1 page  
DIGITAL INTERFACE TRUTH TABLE
LTC1657L
CLR CSMSB CSLSB
LXX
HXX
HXX
HLH
HHL
HLL
HXX
HHX
HXH
HLL
WR
X
X
X
L
L
L
H
X
X
L
LDAC
X
L
H
X
X
X
X
X
X
L
FUNCTION
Clears input and DAC registers to zero
Loads DAC register with contents of input registers
Freezes contents of DAC register
Writes MSB byte into MSB input register
Writes LSB byte into LSB input register
Writes MSB and LSB bytes into MSB and LSB input registers
Inhibits write to MSB and LSB input registers
Inhibits write to MSB input register
Inhibits write to LSB input register
Data bus flows directly through input and DAC registers
TIMING DIAGRAM
CSLSB
t CS
CSMSB
WR
t CWS
tWR tCWH
LDAC
DATA
t DWS
t DWH
DATA VALID
t CS
t WR
DATA VALID
t LDAC
DAC UPDATE
1657 TD
5
5 Page 
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
LTC1657L
N Package
28-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
1.370*
(34.789)
MAX
28 27 26 25 24 23 22 21 20 19 18 17 16 15
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
0.020
(0.508)
MIN
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325 –0.015
( )8.255
+0.889
–0.381
0.125
(3.175)
MIN
0.005
(0.127)
MIN
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.100
(2.54)
BSC
0.018 ± 0.003
(0.457 ± 0.076)
0.065
(1.651)
TYP
N28 1098
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC1657LI.PDF ] | |
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