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DAC8512GBC 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 DAC8512GBC은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 DAC8512GBC 자료 제공

부품번호 DAC8512GBC 기능
기능 % V/ Serial Input Complete 12-Bit DAC
제조업체 Analog Devices
로고 Analog Devices 로고


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DAC8512GBC 데이터시트, 핀배열, 회로
a
FEATURES
Space Saving SO-8 or Mini-DIP Packages
Complete, Voltage Output with Internal Reference
1 mV/Bit with 4.095 V Full Scale
Single +5 Volt Operation
No External Components
3-Wire Serial Data Interface, 20 MHz Data Loading Rate
Low Power: 2.5 mW
APPLICATIONS
Portable Instrumentation
Digitally Controlled Calibration
Servo Controls
Process Control Equipment
PC Peripherals
+5 V, Serial Input
Complete 12-Bit DAC
DAC8512
FUNCTIONAL BLOCK DIAGRAM
CLR 6
LD 5
CS 2
CLK 3
SDI 4
REF
12-BIT DAC
12
DAC REGISTER
12
SERIAL REGISTER
1 VDD
8 VOUT
7 GND
GENERAL DESCRIPTION
The DAC8512 is a complete serial input, 12-bit, voltage output
digital-to-analog converter designed to operate from a single
+5 V supply. It contains the DAC, input shift register and
latches, reference and a rail-to-rail output amplifier. Built using
a CBCMOS process, these monolithic DACs offer the user low
cost, and ease of use in +5 V only systems.
Coding for the DAC8512 is natural binary with the MSB loaded
first. The output op amp can swing to either rail and is set to a
range of 0 V to +4.095 V—for a one-millivolt-per-bit resolution.
It is capable of sinking and sourcing 5 mA. An on-chip reference
is laser trimmed to provide an accurate full-scale output voltage
of 4.095 V.
Serial interface is high speed, three-wire, DSP compatible with
data in (SDI), clock (CLK) and load strobe (LD). There is also
a chip-select pin for connecting multiple DACs.
A CLR input sets the output to zero scale at power on or upon
user demand.
The DAC8512 is specified over the extended industrial (–40°C
to +85°C) temperature range. DAC8512s are available in plas-
tic DIPs and SO-8 surface mount packages.
1.0
0.75
0.5
0.25
0
–0.25
–0.5
–0.75
–1.0
0
1024
2048
3072
DIGITAL INPUT CODE – Decimal
Linearity Error vs. Digital Input Code
4096
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1996




DAC8512GBC pdf, 반도체, 판매, 대치품
DAC8512
SDI
CLK
CS
LD
D11 D10
D9
D8 D7 D6 D5
D4
D3 D2 D1
D0
tcss
tld1
tcsh
tld2
SDI
CLK
LD
CLR
FS
VOUT
ZS
tds
tcl
tdh
tch
tldw
ts
Figure 1. Timing Diagram
tclrw
±1 LSB
ERROR BAND
tS
CS
CLK
SDI
ESD PROTECTION DIODES TO VDD AND GND
DATA
SHIFT
REGISTER
Figure 2. Equivalent Clock Input Logic
Table I. Control-Logic Truth Table
CS2 CLK2 CLR LD Serial Shift Register Function
DAC Register Function
HX
LL
LH
L +
+ L
HX
HX
HX
HX
H H No Effect
H H No Effect
H H No Effect
H H Shift-Register-Data Advanced One Bit
H H Shift-Register-Data Advanced One Bit
H – No Effect
H L No Effect
L X No Effect
+ H No Effect
NOTES
l + positive logic transition; – negative logic transition; X = Don’t Care.
2CS and CLK are interchangeable.
3Returning CS HIGH avoids an additional “false clock” of serial data input.
4Do not clock in serial data while LD is LOW.
Latched
Latched
Latched
Latched
Latched
Updated with Current Shift Register Contents
Transparent
Loaded with All Zeros
Latched All Zeros
–4– REV. A

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DAC8512GBC 전자부품, 판매, 대치품
5
VDD = +5V
TA = +25؇C
4
RLL TIEDD TTOO AAGGNNDD
DA=TFAF=FHFFF H
3
2
1 RL TIED TO +5V
DATA = 000H
0
10 100 1k 10k 100k
LOAD RESISTANCE –
Figure 5. Output Swing vs. Load
Typical Performance Characteristics — DAC8512
100
VDD = +5V
DATA = 000H
10
1 TA = +85؇C
TA = +25؇C
0.1
TA = –40؇C
0.01
1
10 100 1000
OUTPUT SINK CURRENT – A
Figure 6. Pull-Down Voltage vs. Out-
put Sink Current Capability
80
POS0
60 CURRENT0
LIMIT0
40
20
0
DATA = 800H
RL TIED TO +2V
–20
–40
–60
–80
–100
NEG
CURRENT
LIMIT
12 3
OUTPUT VOLTAGE – Volts
Figure 7. Short Circuit Current
50mV
100
90
10
0%
2mS
CODE = FFFH = 409510
BW = 630kHz
SCALE = 100X
TA = +25؇C
TIME = 2ms/DIV
Figure 8. Broadband Noise
4.0
VDD = +5V
3.2 TA = +25؇C
NO LOAD
2.4
1.6
0.8
0.0
0
1 234
LOGIC VOLTAGE VALUE – Volts
5
Figure 9. Supply Current vs. Logic
Input Voltage
100
VDD = +5V ؎200mV AC
80 TA = +25؇C
DATA = FFFH
60
40
20
0
10 100
1k 10k 100k
FREQUENCY – Hz
Figure 10. Power Supply Rejection
vs. Frequency
5.0
VFS 1 LSB
4.8 DATA = FFFH
TA = +25؇C
4.6
PROPER OPERATION
4.4 WHEN VDD SUPPLY
VOLTAGE ABOVE
CURVE
4.2
4.0
0.01
0.04 0.1
0.4 1.0
4.0 10
OUTPUT LOAD CURRENT – mA
Figure 11. Minimum Supply Voltage
vs. Load
5
0
2.048
2.038
2.028
2.018
204810 TO 204710
VDD = 5V
TA = +25؇C
TIME – 200ns/DIV
Figure 12. Midscale DAC Glitch
Performance
1V
100
90
RL = NO LOAD
CL = 110pF
10 TA = +25؇C
0%
20µs
TIME = 20µs/DIV
Figure 13. Large Signal Settling Time
REV. A
–7–

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DAC8512GBC

% V/ Serial Input Complete 12-Bit DAC

Analog Devices
Analog Devices

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