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DAC0800LCM 데이터시트 PDF




National Semiconductor에서 제조한 전자 부품 DAC0800LCM은 전자 산업 및 응용 분야에서
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부품번호 DAC0800LCM 기능
기능 8-Bit Digital-to-Analog Converters
제조업체 National Semiconductor
로고 National Semiconductor 로고


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DAC0800LCM 데이터시트, 핀배열, 회로
June 1999
DAC0800/DAC0802
8-Bit Digital-to-Analog Converters
General Description
The DAC0800 series are monolithic 8-bit high-speed
current-output digital-to-analog converters (DAC) featuring
typical settling times of 100 ns. When used as a multiplying
DAC, monotonic performance over a 40 to 1 reference cur-
rent range is possible. The DAC0800 series also features
high compliance complementary current outputs to allow dif-
ferential output voltages of 20 Vp-p with simple resistor loads
as shown in Figure 1. The reference-to-full-scale current
matching of better than ±1 LSB eliminates the need for
full-scale trims in most applications while the nonlinearities
of better than ±0.1% over temperature minimizes system er-
ror accumulations.
The noise immune inputs of the DAC0800 series will accept
TTL levels with the logic threshold pin, VLC, grounded.
Changing the VLC potential will allow direct interface to other
logic families. The performance and characteristics of the
device are essentially unchanged over the full ±4.5V to
±18V power supply range; power dissipation is only 33 mW
with ±5V supplies and is independent of the logic input
states.
The DAC0800, DAC0802, DAC0800C and DAC0802C are a
direct replacement for the DAC-08, DAC-08A, DAC-08C,
and DAC-08H, respectively.
Features
n Fast settling output current: 100 ns
n Full scale error: ±1 LSB
n Nonlinearity over temperature: ±0.1%
n Full scale current drift: ±10 ppm/˚C
n High output compliance: −10V to +18V
n Complementary current outputs
n Interface directly with TTL, CMOS, PMOS and others
n 2 quadrant wide range multiplying capability
n Wide power supply range: ±4.5V to ±18V
n Low power consumption: 33 mW at ±5V
n Low cost
Typical Applications
DS005686-1
FIGURE 1. ±20 VP-P Output Digital-to-Analog Converter (Note 5)
Ordering Information
Non-Linearity
Temperature
Order Numbers
Range
J Package (J16A) (Note 1) N Package (N16E) (Note 1) SO Package (M16A)
±0.1% FS
±0.19% FS
±0.19% FS
0˚C TA +70˚C
−55˚C TA +125˚C
0˚C TA +70˚C
DAC0802LCJ
DAC0800LJ
DAC0800LCJ
DAC-08HQ DAC0802LCN
DAC-08Q
DAC-08EQ DAC0800LCN
DAC-08HP
DAC-08EP
DAC0802LCM
DAC0800LCM
Note 1: Devices may be ordered by using either order number.
© 1999 National Semiconductor Corporation DS005686
www.national.com




DAC0800LCM pdf, 반도체, 판매, 대치품
Block Diagram (Note 5)
Typical Performance Characteristics
Full Scale Current
vs Reference Current
LSB Propagation Delay vs IFS
DS005686-2
Reference Input
Frequency Response
DS005686-22
Reference Amp
Common-Mode Range
Logic Input Current
vs Input Voltage
DS005686-23
DS005686-24
Curve 1: CC=15 pF, VIN=2 Vp-p centered at 1V.
Curve 2: CC=15 pF, VIN=50 mVp-p centered at
200 mV.
Curve 3: CC=0 pF, VIN=100 mVp-p centered at
0V and applied through 50connected to pin
14.2V applied to R14.
VTH — VLC vs Temperature
DS005686-25
Note. Positive common-mode range is always
(V+) − 1.5V.
www.national.com
DS005686-26
4
DS005686-27

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DAC0800LCM 전자부품, 판매, 대치품
Typical Applications (Continued)
DS005686-6
Pos. Full Scale
Pos. Full Scale−LSB
Zero Scale+LSB
Zero Scale
Zero Scale−LSB
Neg. Full Scale+LSB
Neg. Full Scale
B1 B2 B3 B4 B5 B6 B7 B8 EO
EO
1 1 1 1 1 1 1 1 −9.920 +10.000
1 1 1 1 1 1 1 0 −9.840 +9.920
1 0 0 0 0 0 0 1 −0.080 +0.160
1 0 0 0 0 0 0 0 0.000 +0.080
0 1 1 1 1 1 1 1 +0.080 0.000
0 0 0 0 0 0 0 1 +9.920 −9.840
0 0 0 0 0 0 0 0 +10.000 −9.920
FIGURE 7. Basic Bipolar Output Operation (Note 5)
If RL = RL within ±0.05%, output is symmetrical about ground
DS005686-18
Pos. Full Scale
Pos. Full Scale−LSB
(+)Zero Scale
(−)Zero Scale
Neg. Full Scale+LSB
Neg. Full Scale
B1 B2 B3 B4 B5 B6 B7 B8
11111111
11111110
10000000
01111111
00000001
00000000
EO
+9.960
+9.880
+0.040
−0.040
−9.880
−9.960
FIGURE 8. Symmetrical Offset Binary Operation (Note 5)
DS005686-19
For complementary output (operation as negative logic DAC), connect inverting input of op amp to IO (pin 2), connect IO (pin 4) to ground.
FIGURE 9. Positive Low Impedance Output Operation (Note 5)
7 www.national.com

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