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부품번호 DAC1021 기능
기능 10-Bit/ 12-Bit Binary Multiplying D/A Converter
제조업체 National Semiconductor
로고 National Semiconductor 로고


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DAC1021 데이터시트, 핀배열, 회로
May 1996
DAC1020 DAC1021 DAC1022
10-Bit Binary Multiplying D A Converter
DAC1220 DAC1222
12-Bit Binary Multiplying D A Converter
General Description
The DAC1020 and the DAC1220 are respectively 10 and
12-bit binary multiplying digital-to-analog converters A de-
posited thin film R-2R resistor ladder divides the reference
current and provides the circuit with excellent temperature
tracking characteristics (0 0002% C linearity error temper-
ature coefficient maximum) The circuit uses CMOS current
switches and drive circuitry to achieve low power consump-
tion (30 mW max) and low output leakages (200 nA max)
The digital inputs are compatible with DTL TTL logic levels
as well as full CMOS logic level swings This part combined
with an external amplifier and voltage reference can be
used as a standard D A converter however it is also very
attractive for multiplying applications (such as digitally con-
trolled gain blocks) since its linearity error is essentially in-
dependent of the voltage reference All inputs are protected
from damage due to static discharge by diode clamps to Va
and ground
This part is available with 10-bit (0 05%) 9-bit (0 10%) and
8-bit (0 20%) non-linearity guaranteed over temperature
(note 1 of electrical characteristics) The DAC1020
DAC1021 and DAC1022 are direct replacements for the 10-
bit resolution AD7520 and AD7530 and equivalent to the
AD7533 family The DAC1220 and DAC1222 are direct re-
placements for the 12-bit resolution AD7521 and AD7531
family
Features
Y Linearity specified with zero and full-scale adjust only
Y Non-linearity guaranteed over temperature
Y Integrated thin film on CMOS structure
Y 10-bit or 12-bit resolution
Y Low power dissipation 10 mW 15V typ
Y Accepts variable or fixed reference b25VsVREFs25V
Y 4-quadrant multiplying capability
Y Interfaces directly with DTL TTL and CMOS
Y Fast settling time 500 ns typ
Y Low feedthrough error LSB 100 kHz typ
Equivalent Circuit
Note Switches shown in digital high state
Ordering Information
10-BIT D A CONVERTERS
TL H 5689 – 1
Temperature Range
0 C to 70 C
b40 C to 85 C
Non-
Linearity
0 05%
0 10%
0 20%
DAC1020LCN
DAC1021LCN
DAC1022LCN
AD7520LN AD7530LN
AD7520KN AD7530KN
AD7520JN AD7530JN
DAC1020LCV
DAC1020LIV
Package Outline
N16A
V20A
12-BIT D A CONVERTERS
Temperature Range
0 C to 70 C
b40 C to a85 C
Non-
Linearity
0 05%
0 20%
DAC1220LCN
DAC1222LCN
AD7521LN AD7531LN
AD7521JN AD7531JN
DAC1220LCJ
DAC1222LCJ
AD7521LD AD7531LD
AD7521JD AD7531JD
Package Outline
N18A
J18A
Note Devices may be ordered by either part number
C1996 National Semiconductor Corporation TL H 5689
RRD-B30M96 Printed in U S A
http www national com




DAC1021 pdf, 반도체, 판매, 대치품
Typical Applications
The following applications are also valid for 12-bit systems
using the DAC1220 and 2 additional digital inputs
Operational Amplifier Bias Current (Figure 3 )
The op amp bias current Ib flows through the 15k internal
feedback resistor BI-FET op amps have low Ib and there-
fore the 15k c Ib error they introduce is negligible they are
strongly recommended for the DAC1020 applications
VOS Considerations
The output impedance ROUT of the DAC is modulated by
the digital input code which causes a modulation of the op-
erational amplifier output offset It is therefore recommend-
ed to adjust the op amp VOS ROUT is E15k if more than 4
digital inputs are high ROUT is E45k if a single digital input
is high and ROUT approaches infinity if all inputs are low
Operational Amplifier VOS Adjust (Figure 3 )
Connect all digital inputs A1 – A10 to ground and adjust the
potentiometer to bring the op amp VOUT pin to within g1
mV from ground potential If VREF is less than 10V a finer
VOS adjustment is required It is helpful to increase the reso-
lution of the VOS adjust procedure by connecting a 1 kX
resistor between the inverting input of the op amp to
ground After VOS has been adjusted remove the 1 kX
Full-Scale Adjust (Figure 4 )
Switch high all the digital inputs A1 – A10 and measure the
op amp output voltage Use a 500X potentiometer as
ll llshown to bring VOUT to a voltage equal to VREF c
1023 1024
Op Amp Family
LF357
LF356
LF351
LM741
SELECTING AND COMPENSATING THE OPERATIONAL AMPLIFIER
Circuit Settling
CF Ri P VW
Time ts
10 pF 2 4k 25k Va
22 pF % 25k Va
24 pF % 10k Vb
0 % 10k Vb
1 5 ms
3 ms
4 ms
40 ms
Circuit Small
Signal BW
1M
0 5M
0 5M
200 kHz
 JA1 A2 A3
A10
VOUT e bVREF
a a a
248
1024
b10V s VREF s 10V
1023
0 s VOUT s b 1024 VREF
where AN e 1 if the AN digital input is high
AN e 0 if the AN digital input is low
FIGURE 3 Basic Connection Unipolar or 2-Quadrant Multiplying
Configuration (Digital Attenuator)
TL H 5689 – 3
http www national com
4

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DAC1021 전자부품, 판매, 대치품
Typical Applications (Continued)
VOUT e
bVREF
A1 A2 A3
aaa
248
JA10
1024
where VREF can be an AC signal
 By connecting the DAC in the feedback loop of an opera-
tional amplifier a linear digitally control gain block can be
realized
 Note that with all digital inputs low the gain of the amplifier
is infinity that is the op amp will saturate In other words we
cannot divide the VREF by zero
FIGURE 10 Analog-to-Digital Divider (or Digitally Gain Controlled Amplifier)
A1 A2
aa
24
VOUT e VREF A1 A2
%a a
24
A10
a
 J1024
1023 b N
A10 or VOUT e VREF
N
a
1024
where 0 s N s 1023
N e 0 for AN e all zeros
N e 1 for A10 e 1 A1–A9 e 0
N e 1023 for AN e all 1’s
FIGURE 11 Digitally controlled Amplifier-Attenuator
7
TL H 5689 – 7
http www national com

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10-Bit/ 12-Bit Binary Multiplying D/A Converter

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