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PDF CXA3085AN Data sheet ( Hoja de datos )
| Número de pieza | CXA3085AN | |
| Descripción | All Band TV Tuner IC with On-chip PLL | |
| Fabricantes | Sony Corporation | |
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CXA3085AN
All Band TV Tuner IC with On-chip PLL
For the availability of this product, please contact the sales office.
Description
The CXA3085AN is a monolithic TV tuner IC which
30 pin SSOP (Plastic)
integrates local oscillator and mixer circuits for VHF
band, local oscillator and mixer circuits for UHF
band, an IF amplifier and a tuning PLL onto a single
chip, enabling further miniaturization of the tuner.
Features
• Low noise figure
• Low power consumption (5 V, 54 mA typ.)
• On-chip tuning PLL (3-wire bus format)
• Selection of frequency steps 31.25 kHz, 50 kHz
and 62.5 kHz
• On-chip 4-output band switch
• SSOP 30-pin package
Applications
• TV tuners
• VCR tuners
• CATV tuners
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings (Ta = 25 °C)
• Supply voltage VCC1,VCC2 –0.3 to +5.5
V
VCC3 –0.3 to +10.0 V
• Storage temperature
Tstg –55 to +150 °C
• Allowable power dissipation
PD 880 mW
(when mounted on a substrate)
Operating Conditions
• Supply voltage VCC1, VCC2
VCC3
• Operating temperature
Topr
4.75 to 5.3
4.75 to 9.45
–20 to +75
V
V
°C
Note) Electrostatic discharge strength is weak, and care should be taken in handling this IC.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E97758-TE
1 page  
Pin
Symbol
No.
22 VCC2
23 GND2
24 NC
25 IFOUT
CXA3085AN
Equivalent circuit
—
—
—
8 VCC1
40
25
Pin voltage
(V)
Description
— PLL circuit power supply.
— PLL circuit GND.
— No connected.
2.3 IF output.
26 LOCK
27 CPE
28 CPO
VCC2 22
40k
26
5.0
(Lock)
0.2
(UNLock)
LOCK detection.
High when locked, Low when
unlocked.
VCC2
200
500
20k
22
28
27
NPN transistor connection for
0.6
varicap diode drive.
Charge pump output.
2.0
Connect a loop filter.
29 REFOSC
29
60k
30p
30p
Crystal connection for
4.3
reference oscillator.
30 VCC3
Power supply for external
—
supply.
—5—
5 Page 
CXA3085AN
Description of PLL Block
The PLL on this IC supports the 3-wire bus control format.
The serial data is input to the DA, CL and CE pins. The data is loaded to the shift register at the clock rise,
and latched at the enable fall.
Symbol
CE
CL
DA
LOCK
3-wire bus control
Enable input
Clock input
Data input
Lock signal output
1) Mode Setting Method
The modes for each frequency step are set according to the MS pin voltage.
Mode
A-0
A-1
A-2
A-3
A-4
MS pin voltage
0 to 0.15VCC
OPEN
0.45VCC to 0.55VCC
0.65VCC to 0.75VCC
0.85VCC to VCC
Main
divider
15 bit
14 bit
15 bit
15 bit
15 bit
Reference
divider
1024
512
640
512
512
Reference
frequency∗
3.90625 kHz
7.8125 kHz
6.25 kHz
7.8125 kHz
7.8125 kHz
∗ Frequency step is for when X’tal OSC = 4 MHz.
Frequency
step∗
31.25 kHz
62.5 kHz
50 kHz
62.5 kHz
62.5 kHz
Control
word length
Total 19 bits
Total 18 bits
Total 19 bits
Total 19 bits
Total 27 bits
2) Programming
• The VCO lock frequency is obtained according to the following formula.
fosc = fref × 8 × (32 M + S)
fosc : local oscillator frequency
fref : reference frequency
8 : prescaler fixed frequency division ratio
M : main divider frequency division ratio
S : swallow counter frequency division ratio
The variable frequency division ranges of M and S are as follows, and are set as binary.
32 ≤ M ≤ 1023 (32 ≤ M ≤ 511 for A-1 mode)
0 ≤ S ≤ 31
• The PLL control data is comprised of the above frequency data and the band switch control data.
—11—
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet CXA3085AN.PDF ] | |
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