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PDF CXA3108AQ Data sheet ( Hoja de datos )
| Número de pieza | CXA3108AQ | |
| Descripción | L-band Down Converter IC with On-Chip PLL | |
| Fabricantes | Sony Corporation | |
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CXA3108AQ
L-band Down Converter IC with On-Chip PLL
Description
The CXA3108AQ is a monolithic IC that down-
converts the L-band (1 to 2 GHz) 1st IF to 2nd IF for
satellite broadcast receivers. It integrates a local
oscillator circuit, double-balanced mixer, IF AGC
amplifier and tuning PLL onto a single chip.
This IC supports both analog and digital satellite
broadcasts, and achieves reduction in the number of
tuner components and smaller size.
Features
• On-chip tuning PLL
• Supports 2.65 GHz oscillator frequency
• Noise figure: 12.5 dB typ. (for IF full gain)
• IF AGC gain variation: 46 dB typ.
• Wide band IF AGC amplifier (60 to 500 MHz)
• Two IF outputs
• PLL supports I2C protocol
• On-chip high voltage drive transistor for charge
pump
40 pin QFP (Plastic)
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
VCC –0.3 to +5.5 V
• Storage temperature Tstg –55 to +150 °C
• Allowable power dissipation
PD 730 mW
(when mounted on a substrate)
Operating Conditions
• Supply voltage
• Operating temperature
VCC
Topr
4.75 to 5.30 V
–25 to +75 °C
Applications
• Analog satellite broadcast tuners (BS/CS)
• Digital satellite broadcast tuners (DSS/DVB, etc.)
Structure
Bipolar silicon monolithic IC
Notes on Handling
This IC has a weak electrostatic discharge strength. Take care when handling the IC.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E99904-TE
1 page  
CXA3108AQ
Pin Pin voltage
Symbol
No. [V]
23 STSW
—
Equivalent circuit
30
20k
23
DVCC1
24 DVCC2
5
Description
Selects either the internal
oscillator circuit or external input
for input to PLL.
When this pin is open or
connected to VCC, the internal
oscillator circuit is selected;
when connected to GND,
external input is selected.
Charge pump power supply.
25 LOCK
5.0
(LOCK)
0.2
(UNLOCK)
DVCC1
30
LOCK detection.
25 High when locked, Low when
unlocked.
26 ADC
30
— 26
DVCC1
ADC input.
27 SDA
30 DVCC1
5k
— 27
20
2.5k 40k
DATA input.
—5—
5 Page 
CXA3108AQ
Description of Functions
The CXA3108AQ is a tuner IC for satellite broadcast receivers. It converts the RF signal down-converted to
1st IF (1 to 2 GHz) at the LNB to 2nd IF, so that only the desired reception frequency is selected and
detected.
This IC combines the mixer, local oscillator and IF amplifier (variable gain) circuits required for frequency
conversion to 2nd IF, and the PLL circuit which controls the local oscillator frequency onto a single chip.
The function of each block is described below.
1. Mixer Circuit
This circuit outputs the frequency difference between the signal input to RF IN and the local oscillator
signal. A double-balanced mixer with minimal local oscillator signal leak is used. RF input is equivalent to a
differential amplifier with emitter grounding.
2. Local Oscillator Circuit
A Colpitts oscillator with differential operation is used for the oscillator circuit, so it is stable relative to
supply voltage fluctuation, and undesired radiation is suppressed. This circuit also contains a capacitor
which is part of the resonance circuit, so there is minimal parasitic oscillation and design of external circuits
is easier.
3. IF Amplifier Circuit
This circuit amplifies the mixer IF output, and is comprised of an AGC amplifier stage and low impedance
output stage.
The gain can be varied by the AGC pin voltage (range 0 to 4 V) at the AGC amplifier stage. The maximum
gain is approximately 20 dB (voltage gain between RF IN and IF OUT), and the gain variation width is 30
dB or more.
The output stage has two unbalanced outputs, and can directly connect two SAW filters with different pass
bandwidths. Output pin selection is determined by the IF SW pin voltage.
The IF amplifier circuit is a wide band amplifier circuit, and can be used in the IF frequency range of 60 to
500 MHz.
4. PLL Circuit-1 (normal operation: when the STSW pin is open or connected to VCC)
The PLL circuit fixes the local oscillator frequency to the desired frequency. It consists of the prescaler,
main divider, reference divider, phase comparator, charge pump and reference oscillator. The control
format supports the I2C bus protocol.
When the power (DVCC1) is turned on, the power-on reset circuit activates and the frequency division data
and control data are all initialized to 0. The power-on reset threshold is 3 V at normal temperature (Ta=25
°C).
5. PLL Circuit-2 (external input PLL operation: when the STSW pin is connected to GND)
When the STSW pin is connected to GND, the PLL enters independent operation mode where the PLL only
is used with the oscillator signal input from the external signal input pin.
—11—
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet CXA3108AQ.PDF ] | |
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