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PDF CXA3512R Data sheet ( Hoja de datos )
| Número de pieza | CXA3512R | |
| Descripción | LCD Driver | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXA3512R
LCD Driver
For the availability of this product, please contact the sales office.
Description
The CXA3512R is a driver IC for the analog inputs
of SVGA or higher Sony polycrystalline silicon TFT
LCD panels. It has a line invert amplifier and analog
demultiplexers, as well as the timing generator and
output buffers required for these. The CXA3512R
can directly drive an LCD panel. The VCOM setting
circuit and precharge pulse waveform generator are
also on-chip.
64 pin LQFP (Plastic)
Features
• High-speed signal processing supports XGA high refresh signal
• Overall wide band response
• Low output deviation by on-chip output offset cancel circuit
• Invert amplifier with small phase delay difference between inverted signal and non-inverted signal
• On-chip timing generator with ECL
• Dot clock phase adjustment function
• VCOM voltage generation circuit
• Precharge pulse waveform generation circuit
Absolute Maximum Ratings
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
Vcc
VDD
PD
16
5.5
–20 to +70
–65 to +150
2300
V
V
°C
°C
mW (single layered board mounted)
Recommended Operating Conditions
• Supply voltage
Vcc
VDD
• Ambient temperature
15.0 to 15.5
4.75 to 5.25
–20 to +70
V
V
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E99803A9Z-PS
1 page  
CXA3512R
Pin
No.
Symbol
I/O
Standard
voltage level
36 FRP
I
High: ≥ 2.5V
Low: ≤ 0.8V
Equivalent circuit
VDD VDD
VDD
100k
36
10k
50µ
Description
Invert pulse input.
High: inverse
Low: non-inverse
See the Timing Chart.
37 SID_O
O 2 to 12V
38 SID_R
I 3.3V
VCC
VCC
78k
37
145
0.2p
78k
0.2p
VCC
VCC
10µ
38
30k
SID block output.
Provide an external buffer for
precharge.
Precharge signal invert offset
adjustment.
When using the CXA2111R SID,
connect to the V33 output of the
CXA2111R.
39 SID_IN
I 2.3 to 3.3V
VCC
VCC
40µ
39
145
Precharge waveform input.
Can be connected directly to the
CXA2111R SID output.
Connect to 5V when not using the
SID block.
44 SH_IN
I 2 to 10V
45 VIDEO_O O 2 to 10V
VCC
200
44
200
Analog demultiplexer input.
Connect to the VIDEO_O (Pin 45)
output.
550µ Do not input 2V or less.
VCC
VCC VCC
VCC
600µ
45
600µ
Invert amplifier output.
Connect directly to Pin 44.
When using two CXA3512R in
parallel in XGA or UXGA mode, use
the invert amplifier of only one IC,
and connect the output to Pin 44 of
both ICs.
–5–
5 Page 
Level Diagram
VIDEO_I to SHOUT
(SIGCNT = 7V, VIDEO_R = input 100% white level)
VCC
10.667V
12.5V
SIGCNT = 7V
V white
7.667V
6.333V
8V
6V
V black
VIDEO_I = 1.5Vp-p
3.333V
1.5V
GND
VIDEO_I
2.0 times
1.5 times
VIDEO_O
SHOUT
SH_IN
VIDEO_I to VIDEO_O
The formulas for calculating the VIDEO_I to SHOUT internal DC gain are as follows.
For non-inverse:
VIDEO_O = 2.0 × (VIDEO_I – VIDEO_R) + SIGCNT × (1 – 1/10.5)
SHOUT = 3.0 × (VIDEO_I – VIDEO_R) + SIGCNT × (1 – 1/7)
For inverse:
VIDEO_O = –2.0 × (VIDEO_I – VIDEO_R) + SIGCNT × (1 + 1/10.5)
SHOUT = –3.0 × (VIDEO_I – VIDEO_R) + SIGCNT × (1 + 1/7)
CXA3512R
– 11 –
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet CXA3512R.PDF ] | |
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