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PDF CXD2724AQ-1 Data sheet ( Hoja de datos )
| Número de pieza | CXD2724AQ-1 | |
| Descripción | Single-Chip Dolby Pro Logic Surround Decoder | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXD2724AQ-1
Single-Chip Dolby Pro Logic Surround Decoder
For the availability of this product, please contact the sales office.
Description
The CXD2724AQ-1 is a CMOS LSI developed for
Dolby Pro Logic Surround. A SRAM for short delay
and AD/DA converters are built in, and all functions
necessary for Dolby Pro Logic Surround such as an
adaptive matrix, a passive decoder including BNR,
auto input balance, a noise sequencer and center
channel mode control are contained on a single
chip. Further, this LSI also supports Dolby 3 Stereo
and Virtual Dolby Surround.
80 pin QFP (Plastic)
Features
• Dolby Pro Logic Surround decoding with a single
chip
• 2-channel 1-bit AD converter, decimation filter and
prefilter operational amplifier
• 4-channel 1-bit DA converter, oversampling filter
and post filter
• Analog switch for DSP bypass
• Analog electronic attenuator (+1.5 to –29.5dB) for
center/surround channel trim
• 24K-bit SRAM for short delay
• No separation or other variance for digital
processing
• External parts reduced by incorporating analog
circuits
Functions
• Adaptive matrix
• Center channel mode control
(Normal/Phantom/Wide)
• Dolby 3 Stereo
• Auto input balance control (ON/OFF)
• Noise sequencer
• Variable delay time (0 to 34.8ms)
• 7 kHz low-pass filter (12dB/Oct)
• Modified Dolby B-type NR
• Simple SFC function
• Virtual Dolby Surround
• SFC mode
• DSP bypass mode (L, R-channel through)
Structure
Silicon gate CMOS
Applications
Equipment having Dolby Pro Logic Surround
function such as AV amplifiers, receivers and
compact music systems
Absolute Maximum Ratings (Ta = 25°C, VSS = 0V)
• Supply voltage VDD VSS – 0.5 to +7.0
V
• Input voltage
VI VSS – 0.5 to VDD + 0.5 V
• Output voltage VO VSS – 0.5 to VDD + 0.5 V
• Operating temperature
Topr
–20 to +70
°C
• Storage temperature
Tstg –55 to +150
*C
Recommended Operating Conditions
• Supply voltage VDD
Analog system
4.75 to 5.25 (5.0 typ.)
Digital system
4.50 to 5.25 (5.0 typ.)
• Operating temperature
Ta –20 to +70
V
V
°C
Input/Output Capacitance
• Input capacitance CIN
9 (max.)
pF
• Output capacitance COUT
11 (max.)
pF
• Input/output capacitance
CI/O 11 (max.)
pF
∗ Measurement conditions: VDD = VI = 0V, F = 1MHz
Maximum Current Consumption
(Ta = 25°C, VDD = 5.25V)
• Digital/analog block total: 166.7mA
Dolby level
• During analog input: 200 to 300mVrms
• During digital input: –20dBFS
Analog characteristics
Pro Logic ON: Dolby level = 300mVrms
Prefilter gain = –3.52dB
• S/N: L, Rch = 80dB, C, Sch = 72dB
• THD + N: L, Rch = 0.015%, C, Sch = 0.03%
∗ All values for typ.
This device is available only to arties obtaining the license from Dolby Laboratories Licensing Cor oration.
"Dolby", the double-D symbol and "Pro Logic" are trademarks of Dolby Laboratories Licensing Corporation.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E98829A8X-PS
1 page  
CXD2724AQ-1
DC Characteristics
(AVD1 to 6 = AVDX = VDD0 to 2 = 5V ± 5%, AVS1 to 6 = AVSX = VSS0 to 7 = 0V, Ta = –20 to +70°C)
Item
Symbol Conditions
Min. Typ. Max. Unit
Applicable pins
Input voltage High level VIH
(1) Low level VIL
CMOS input
0.7VDD
V ∗1, ∗2, ∗7
0.3VDD V ∗1, ∗2, ∗7
Input voltage High level VIH
(2) Low level VIL
Schmitt input
0.8VDD
V ∗5
0.2VDD V ∗5
Input voltage High level VIH
(3) Low level VIL
TTL input
2.2
V ∗3, ∗6
0.8 V ∗3, ∗6
Input voltage (4)
VIN Analog input
VSS
VDD
V ∗4
Output voltage High level VOH IOH = –2.0mA
(1) Low level VOL IOL = 4.0mA
VDD – 0.8
V ∗8, ∗9
0.4 V ∗8, ∗9, ∗10
Output voltage High level VOH IOH = –12.0mA
(2) Low level VOL IOL = 12.0mA
VDD/2
V ∗11
VDD/2 V ∗11
Input leak current (1)
II
VIH = VDD, VSS
–10
10 µA ∗1, ∗5, ∗7
Input leak current (2)
II
VIH = VDD, VSS
–40
40 µA ∗2, ∗3, ∗6
Output leak current
IOZ VIH = VDD, VSS
–40
40 µA ∗9, ∗10
Feedback resistance
RFB
250k 1M 2.5M Ω Resistance between ∗7 and ∗11
∗1 CSL2, CSL1, TST0 to TST4, XMST
∗2 XLAT, RVDT, XS24, SCK
∗3 SI
∗4 LIN, RIN
∗5 XRST
∗6 During input to bidirectional pins BCK, LRCK
∗7 XTLI
∗8 During output from bidirectional pins BCK, LRCK
∗9 BFOT
∗10 REDY
∗11 XTLO
–5–
5 Page 
CXD2724AQ-1
2-2. When Pro Logic mode is off
Unless otherwise specified, the measurement conditions are as given below.
• Digital data = Full scale (0dBFS)
• fIN = 1kHz
Item Measurement conditions Channels Min. Typ.
S/N ratio
EIAJ
(with "A" weighting filter)
L, R
C, S
100
91
THD + N∗41
EIAJ (0dB)
EIAJ (–3dB)
L, R 0.03
C, S 0.007
L, R 0.007
C, S 0.01
Dynamic range∗42
Output level∗43
EIAJ (–60dB)
L, R 87
C, S 83
(all) 2.0
∗41 See Graphs 2a and 2b.
∗42 THD + N during –60dB input
∗43 The output level depends on supply voltage AVDn as shown in (Formula 3) below.
Supply voltage AVDn [V]
Output level [Vrms] = 1.9 [Vrms] ×
5.0 [V]
(Formula 3)
Max.
Unit
dB
%
dB
Vrms
10 10
0dB = Full scale
fin = 1kHz
0dB = Full scale
fin = 1kHz
11
0.1 0.1
0.01 0.01
0.001
–60
–50 –40 –30 –20 –10
Digital input level [dB]
0
Graph 2a. L, R Channel Characteristics
0.001
–60
–50 –40 –30 –20 –10
Digital input level [dB]
0
Graph 2b. C, S Channel Characteristics
– 11 –
11 Page | ||
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| PDF Descargar | [ Datasheet CXD2724AQ-1.PDF ] | |
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