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Número de pieza | 100328D | |
Descripción | Low Power Octal ECL/TTL Bi-Directional Translator with Latch | |
Fabricantes | National Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 100328D (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
No Preview Available ! August 1998
100328
Low Power Octal ECL/TTL Bi-Directional Translator with
Latch
General Description
The 100328 is an octal latched bi-directional translator de-
signed to convert TTL logic levels to 100K ECL logic levels
and vice versa. The direction of this translation is determined
by the DIR input. A LOW on the output enable input (OE)
holds the ECL outputs in a cut-off state and the TTL outputs
at a high impedance level. A HIGH on the latch enable input
(LE) latches the data at both inputs even though only one
output is enabled at the time. A LOW on LE makes the
100328 transparent.
The cut-off state is designed to be more negative than a nor-
mal ECL LOW level. This allows the output emitter-followers
to turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance re-
duces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100328 is designed with FAST® TTL output buffers, fea-
turing optimal DC drive and capable of quickly charging and
discharging highly capacitive loads. All inputs have 50 kΩ
pull-down resistors.
Features
n Identical performance to the 100128 at 50% of the
supply current
n Bi-directional translation
n 2000V ESD protection
n Latched outputs
n FAST TTL outputs
n TRI-STATE® outputs
n Voltage compensated operating range =
−4.2V to −5.7V
n Available to MIL-STD-883
Logic Symbol
DS100295-1
Pin Names
E0– E7
T0– T7
OE
LE
DIR
Description
ECL Data I/O
TTL Data I/O
Output Enable Input
Latch Enable Input
Direction Control Input
All pins function at 100K ECL levels except for T0–T7.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FAST® is a registered trademark of Fairchild Semiconductor.
© 1998 National Semiconductor Corporation DS100295
www.national.com
1 page Military Version
ECL-to-TTL DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C, CL = 50 pF, VTTL = +4.5V to + 5.5V
Symbol
Parameter
VOH Output HIGH Voltage
Min Max Units
TC
Conditions
2.5 mV 0˚C to +125˚C IOH = −1 mA, VTTL = 4.50V
2.4 −55˚C
VOL Output LOW Voltage
0.5 mV
−55˚C
+125˚C
IOL = 24 mA, VTTL = 4.50V
VIH Input HIGH Voltage −1165 −870 mV
−55˚C
Guaranteed HIGH Signal
+125˚C
for All Inputs
VIL
Input LOW Voltage −1830 −1475 mV
−55˚C to
Guaranteed LOW Signal
+125˚C
for All Inputs
IIH
IIL
IOZHT
Input HIGH Current
Input LOW Current
TRI-STATE Current
Output High
350 µA
500
0.50
µA
70 µA
0˚C to
+125˚C
−55˚C to
+125˚C
−55˚C to
+125˚C
VEE = −5.7V
VIN = VIH (Max)
VEE = −4.2V
VIN = VIL (Min)
VOUT = +2.7V
IOZLT
TRI-STATE Current
Output Low
−1.0
mA
−55˚C to
VOUT = +0.5V
+125˚C
IOS
Output Short-Circuit
−150 −60 mA
−55˚C to
VOUT = 0.0V, VTTL = +5.5V
CURRENT
+125˚C
ITTL VTTL Supply Current
75 mA
50 mA
−55˚C to
+125˚C
TTL Outputs Low
TTL Output High
70 mA
TTL Output in TRI-STATE
Notes
(Notes 8, 9, 10)
(Notes 8, 9, 10, 11)
(Notes 8, 9, 10, 11)
(Notes 8, 9, 10)
(Notes 8, 9, 10)
(Notes 8, 9, 10)
(Notes 8, 9, 10)
(Notes 8, 9, 10)
(Notes 8, 9, 10)
Note 8: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 9: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups, 1, 2 3, 7, and 8.
Note 10: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 11: Guaranteed by applying specified input condition and testing VOH/VOL.
Military Version
TTL-to-ECL AC Electrical Characteristics
VEE = −4.2V to −5.7V, VTTL = +4.5V to +5.5V, VCC = VCCA = GND
Symbol
Parameter
TC = −55˚C TC = 25˚C
tPLH
tPHL
tPLH
tPHL
tPZH
tPHZ
tPHZ
tset
thold
tpw(H)
tTLH
tTHL
TN to En
(Transparent)
LE to En
OE to En
(Cutoff to HIGH)
OE to En
(HIGH to Cutoff)
DIR to En
(HIGH to Cutoff)
Tn to LE
Tn to LE
Pulse Width LE
Transition Time
20% to 80%, 80% to 20%
Min Max Min Max
0.8 3.4 1.1 3.6
1.2 3.8 1.4 3.7
0.8 3.6 1.5 4.0
1.5 4.6 1.6 4.2
1.6 4.7 1.6 4.3
2.5 2.0
2.5 2.0
2.5 2.0
0.4 2.3 0.5 2.1
TC =
+125˚C
Min Max
0.8 3.7
1.1 3.8
2.0 5.2
Units
ns
ns
ns
ns
ns
Conditions
Figures 1, 2
Figures 1, 2
Figures 1, 2
1.6 4.3 ns Figures 1, 2
1.7 4.3 ns Figures 1, 2
2.5
2.5
2.5
0.4 2.4
ns Figures 1, 2
ns Figures 1, 2
ns Figures 1, 2
ns Figures 1, 2
Notes
(Notes 12,
13, 14)
(Notes 12,
13, 14)
(Note 15)
(Note 15)
(Note 15)
5 www.national.com
5 Page Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D)
NS Package Number J24E
24-Lead Quad Cerpak (F)
NS Package Number W24B
11
www.national.com
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet 100328D.PDF ] |
Número de pieza | Descripción | Fabricantes |
100328 | Low Power Octal ECL/TTL Bi-Directional Translator with Latch | National Semiconductor |
100328 | Low Power Octal ECL/TTL Bi-Directional Translator with Latch | Fairchild Semiconductor |
100328D | Low Power Octal ECL/TTL Bi-Directional Translator with Latch | National Semiconductor |
100328F | Low Power Octal ECL/TTL Bi-Directional Translator with Latch | National Semiconductor |
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