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부품번호 | 100329PC 기능 |
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기능 | Low Power Octal ECL/TTL Bidirectional Translator with Register | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
August 1989
Revised August 2000
100329
Low Power Octal ECL/TTL Bidirectional Translator
with Register
General Description
The 100329 is an octal registered bidirectional translator
designed to convert TTL logic levels to 100K ECL logic lev-
els and vice versa. The direction of the translation is deter-
mined by the DIR input. A LOW on the output enable input
(OE) holds the ECL outputs in a cut-off state and the TTL
outputs at a high impedance level. The outputs change
synchronously with the rising edge of the clock input (CP)
even though only one output is enabled at the time.
The cut-off state is designed to be more negative than a
normal ECL LOW level. This allows the output emitter-fol-
lowers to turn off when the termination supply is −2.0V, pre-
senting a high impedance to the data bus. This high
impedance reduces the termination power and prevents
loss of low state noise margin when several loads share
the bus.
The 100329 is designed with FAST TTL output buffers,
featuring optimal DC drive and capable of quickly charging
and discharging highly capacitive loads. All inputs have
50 kΩ pull-down resistors.
Features
s Bidirectional translation
s ECL high impedance outputs
s Registered outputs
s FAST TTL outputs
s 3-STATE outputs
s Voltage compensated operating range = −4.2V to −5.7V
s High drive IOS
Ordering Code:
Order Number Package Number
Package Description
100329PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100329QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100329QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP
28-Pin PLCC
FAST is a registered trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS010583
www.fairchildsemi.com
ECL-to-TTL DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C, CL = 50 pF, VTTL = +4.5V to +5.5V (Note 8)
Symbol
Parameter
Min
Typ
Max
Units
Conditions
VOH Output HIGH Voltage
VOL Output LOW Voltage
VIH Input HIGH Voltage
2.7
2.4
−1165
3.1
2.9
0.3
0.5
−870
V IOH = −3 mA, VTTL = 4.75V
V IOH = −3 mA, VTTL = 4.50V
V IOL = 24 mA, VTTL = 4.50V
mV Guaranteed HIGH Signal
for All Inputs
VIL Input LOW Voltage
−1830
−1475
mV Guaranteed LOW Signal
for All Inputs
IIH
IIL
IOZHT
Input HIGH Current
Input LOW Current
3-STATE Current
Output HIGH
0.50
350 µA VIN = VIH (Max)
µA VIN = VIL (Min)
70 µA VOUT = +2.7V
IOZLT
3-STATE Current
Output LOW
−700
µA VOUT = +0.5V
IOS Output Short-Circuit
Current
−225
−100
mA VOUT = 0.0V, VTTL = +5.5V
ITTL VTTL Supply Current
74 mA TTL Outputs LOW
49 mA TTL Outputs HIGH
67 mA TTL Outputs in 3-STATE
Note 8: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
DIP TTL-to-ECL AC Electrical Characteristics
VEE = −4.2V to −5.7V, VTTL = +4.5V to +5.5V, VCC = VCCA = GND
Symbol
Parameter
TC = 0°C
Min Max
TC = 25°C
Min Max
fMAX
tPLH
tPHL
tPZH
Max Toggle Frequency
CP to En
OE to En
(Cutoff to HIGH)
350 350
1.7 3.6 1.7 3.7
1.3 4.2 1.5 4.4
tPHZ
OE to En
(HIGH to Cutoff)
1.5 4.5 1.6 4.5
tPHZ
DIR to En
(HIGH to Cutoff)
1.6 4.3 1.6 4.3
tSET
tHOLD
tPW(H)
tTLH
tTHL
Tn to CP
Tn to CP
Pulse Width CP
Transition Time
20% to 80%, 80% to 20%
1.1 1.1
1.7 1.7
2.1 2.1
0.6 1.6 0.6 1.6
TC = 85°C
Min Max
350
1.9 3.9
Units
Conditions
MHz
ns Figures 1, 2
1.7 4.8 ns Figures 1, 2
1.6 4.6 ns Figures 1, 2
1.7 4.5 ns Figures 1, 2
1.1 ns Figures 1, 2
1.9 ns Figures 1, 2
2.1 ns Figures 1, 2
0.6 1.6 ns Figures 1, 2
www.fairchildsemi.com
4
4페이지 Test Circuitry (TTL-to-ECL)
Note 11: RT = 50Ω termination resistive load. When an input or output is being monitored by a scope, RTis supplied by the scope’s 50Ω input resistance.
When an input or output is not being monitored, an external 50Ω resistance must be applied to serve as RT.
Note 12: TTL and ECL force signals are brought to the DUT via 50Ω coax lines.
Note 13: VTTL is decoupled to ground with 0.1 µF, VEE is decoupled to ground with 0.01 µF and VCC is connected to ground.
FIGURE 1. TTL-to-ECL AC Test Circuit
Switching Waveforms (TTL-to-ECL)
FIGURE 2. TTL to ECL Transition—Propagation Delay and Transition Times
7 www.fairchildsemi.com
7페이지 | |||
구 성 | 총 11 페이지수 | ||
다운로드 | [ 100329PC.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
100329PC | Low Power Octal ECL/TTL Bidirectional Translator with Register | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |