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33887 PDF 데이터시트 ( Data , Function )

부품번호 33887 기능
기능 5.0 A H-Bridge with Load Current Feedback
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33887 데이터시트, 핀배열, 회로
MOTOROLA
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33887
Rev 9.0, 10/2004
5.0 A H-Bridge with Load Current
Feedback
The 33887 is a monolithic H-Bridge Power IC with a load current feedback
feature making it ideal for closed-loop DC motor control. The IC incorporates
internal control logic, charge pump, gate drive, and low RDS(ON) MOSFET
output circuitry. The 33887 is able to control inductive loads with continuous
DC load currents up to 5.0 A, and with peak current active limiting between
5.2 A and 7.8 A. Output loads can be pulse width modulated (PWM-ed) at
frequencies up to 10 kHz. The load current feedback feature provides a
proportional (1/375th of the load current) constant-current output suitable for
monitoring by a microcontroller’s A/D input. This feature facilitates the design
of closed-loop torque/speed control as well as open load detection.
A Fault Status output terminal reports undervoltage, short circuit, and
overtemperature conditions. Two independent inputs provide polarity control
of two half-bridge totem-pole outputs. Two disable inputs force the H-Bridge
outputs to tri-state (exhibit high impedance).
The 33887 is parametrically specified over a temperature range of
-40°C TA 125°C and a voltage range of 5.0 V V+ 28 V. The IC can also
be operated up to 40 V with derating of the specifications.
Features
• 5.0 V to 40 V Continuous Operation
• 120 mRDS(ON) H-Bridge MOSFETs
• TTL/CMOS Compatible Inputs
• PWM Frequencies up to 10 kHz
• Active Current Limiting (Regulation) via Internal Constant OFF-Time
PWM (with Temperature-Dependent Threshold Reduction)
• Output Short Circuit Protection (Short to V+ or Short to GND)
• Undervoltage Shutdown
• Fault Status Reporting
• Sleep Mode with Current Draw 50 µA (Inputs Floating or Set to Match
Default Logic States)
• Pb-Free Packaging Designated by Suffix Codes VW and PNB
33887
5.0 A H-BRIDGE WITH LOAD
CURRENT FEEDBACK
DH SUFFIX
VW (Pb-FREE) SUFFIX
CASE 979-04
20-TERMINAL HSOP
PNB (Pb-FREE) SUFFIX
CASE 1503-01
36-TERMINAL PQFN
Bottom View
DWB SUFFIX
CASE 1390-01
54-TERMINAL SOICW-EP
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33887DH/R2
PC33887VW/R2
MC33887PNB/R2
MC33887DWB/R2
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
20 HSOP
36 PQFN
54 SOICW-EP
3333888877SSiimmSpipmllipiffiliiefeideddAAAppppppllicliicacataiottiniooDnniaDgDriaiaamggrraamm
5.0 V
3333888877
V+
CCP V+
IN
MCU
OUT
OUT
OUT
OUT
OUT
A/D
OUT1
FS
MOTOR
EN
IN1 OUT2
IN2
D1 PGND
D2
FB AGND
© Motorola, Inc. 2004
For More Information On This Product,
Go to: www.freescale.com




33887 pdf, 반도체, 판매, 대치품
Freescale Semiconductor, Inc.
Transparent Top View of Package
NC 1
D1 2
IN2 3
EN 4
V+ 5
V+ 6
NC 7
AGND 8
FS 9
NC 10
28 NC
27 D2
26 PGND
25 PGND
24 PGND
23 PGND
22 PGND
21 PGND
20 FB
19 NC
PQFN TERMINAL DEFINITIONS
A functional description of each terminal can be found in the System/Application Information section, page 19.
Terminal
Terminal
Name
Formal Name
Definition
1, 7, 10, 16,
19, 28, 31
NC
No Connect
No internal connection to this terminal.
2
D1
Disable 1
Active HIGH input used to simultaneously tri-state disable both H-Bridge
outputs. When D1 is Logic HIGH, both outputs are tri-stated.
3
IN2
Logic Input Control 2
Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
4 EN
Enable
Logic input Enable control of device (i.e., EN logic HIGH = full operation,
EN logic LOW = Sleep Mode).
5, 6, 12, 13, 34, 35
V+
Positive Power Supply
Positive supply connections.
8
AGND
Analog Ground
Low-current analog signal ground.
9 FS Fault Status for H-Bridge Open drain active LOW Fault Status output requiring a pullup resistor to
5.0 V.
11
IN1
Logic Input Control 1
Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
14, 15, 17, 18
OUT1
H-Bridge Output 1
Output 1 of H-Bridge.
20
FB
Feedback for H-Bridge
Current feedback output providing ground referenced 1/375th ratio of
H-Bridge high-side current.
21– 26
PGND
Power Ground
High-current power ground.
27 D2
Disable 2
Active LOW input used to simultaneously tri-state disable both H-Bridge
outputs. When D2 is Logic LOW, both outputs are tri-stated.
29, 30, 32, 33
OUT2
H-Bridge Output 2
Output 2 of H-Bridge.
36 CCP Charge Pump Capacitor External reservoir capacitor connection for internal charge pump capacitor.
Pad
Thermal
Exposed Pad Thermal
Exposed pad thermal interface for sinking heat from the device.
Interface
Interface
Note Must be DC-coupled to analog ground and power ground via very low
impedance path to prevent injection of spurious signals into IC substrate.
33887
4
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com

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33887 전자부품, 판매, 대치품
Freescale Semiconductor, Inc.
MAXIMUM RATINGS (continued)
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
THERMAL RESISTANCE (AND PACKAGE DISSIPATION) RATINGS (Note 8), (Note 9), (Note 10), (Note 11)
Junction-to-Board (Bottom Exposed Pad Soldered to Board)
HSOP (6.0 W)
PQFN (4.0 W)
SOICW-EP (2.0 W)
RθJB
~ 5.0
~ 4.3
~ 8.0
°C/W
Junction-to-Ambient, Natural Convection, Single-Layer Board (1s)
(Note 12)
HSOP (6.0 W)
PQFN (4.0 W)
SOICW-EP (2.0 W)
RθJA
~41
~ TBD
~62
°C/W
Junction-to-Ambient, Natural Convection, Four-Layer Board (2s2p)
(Note 13)
HSOP (6.0 W)
PQFN (4.0 W)
SOICW-EP (2.0 W)
RθJMA
~30
~ 21.3
~ TBD
°C/W
Junction-to-Case (Exposed Pad) (Note 14)
HSOP (6.0 W)
PQFN (4.0 W)
SOICW-EP (2.0 W)
RθJC
~ 0.5
~ 0.9
~1.5
°C/W
Notes
8. The limiting factor is junction temperature, taking into account the power dissipation, thermal resistance, and heat sinking.
9. Exposed heatsink pad plus the power and ground terminals comprise the main heat conduction paths. The actual RθJB (junction-to-PC board)
values will vary depending on solder thickness and composition and copper trace thickness. Maximum current at maximum die temperature
represents ~16 W of conduction loss heating in the diagonal pair of output MOSFETs. Therefore, the RθJC-total must be less than 5.0 °C/W
for maximum load at 70°C ambient. Module thermal design must be planned accordingly.
10. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface
of the board near the package.
11. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
12. Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
13. Per JEDEC JESD51-6 with the board horizontal.
14. Indicates the average thermal resistance between the die and the exposed pad surface as measured by the cold plate method (MIL SPEC-
883 Method 1012.1) with the cold plate temperature used for the case temperature.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
33887
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