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부품번호 3952 기능
기능 FULL-BRIDGE PWM MOTOR DRIVER
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3952 데이터시트, 핀배열, 회로
3952
FULL-BRIDGE PWM MOTOR DRIVER
A3952SB
BRAKE 1
REF 2
VBB
RC 3
GROUND 4
GROUND 5
LOGIC
SUPPLY
6
VCC
PHASE 7
ENABLE 8
LOGIC
VBB
16
LOAD
SUPPLY
15 OUTB
14 MODE
13 GROUND
12 GROUND
11 SENSE
10 OUTA
LOAD
9 SUPPLY
Dwg. PP-056
Note that the A3952SB (DIP) and the A3952SLB
(SOIC) are electrically identical and share a
common terminal number assignment.
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB .................. 50 V
Output Current, IOUT
(tw 20 µs) .................................. ±3.5 A
(Continuous) ............................... ±2.0 A
Logic Supply Voltage, VCC ................. 7.0 V
Logic Input Voltage Range,
VIN ....................... -0.3 V to VCC + 0.3 V
Sense Voltage, VSENSE ...................... 1.5 V
Reference Voltage, VREF .................... 15 V
Package Power Dissipation,
PD ....................................... See Graph
Operating Temperature Range,
TA ............................... –20°C to +85°C
Junction Temperature, TJ ............. +150°C*
Storage Temperature Range,
TS ............................. –55°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, heat sinking and/or forced
cooling. Under any set of conditions, do not
exceed the specified current rating or a junction
temperature of +150°C.
* Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated but
should be avoided.
Designed for bidirectional pulse-width modulated current control of
inductive loads, the A3952S– is capable of continuous output currents
to ±2 A and operating voltages to 50 V. Internal fixed off-time PWM
current-control circuitry can be used to regulate the maximum load
current to a desired value. The peak load current limit is set by the
user’s selection of an input reference voltage and external sensing
resistor. The fixed OFF-time pulse duration is set by a user-selected
external RC timing network. Internal circuit protection includes thermal
shutdown with hysteresis, transient suppression diodes, and crossover-
current protection. Special power-up sequencing is not required.
With the ENABLE input held low, the PHASE input controls load
current polarity by selecting the appropriate source and sink driver pair.
The MODE input determines whether the PWM current-control circuitry
operates in a slow current-decay mode (only the selected sink driver
switching) or in a fast current-decay mode (selected source and sink
switching). A user-selectable blanking window prevents false triggering
of the PWM current control circuitry. With the ENABLE input held high,
all output drivers are disabled. A sleep mode is provided to reduce
power consumption when inactive.
When a logic low is applied to the BRAKE input, the braking
function is enabled. This overrides ENABLE and PHASE to turn OFF
both source drivers and turn ON both sink drivers. The brake function
can be safely used to dynamically brake brush dc motors.
The A3952S– is supplied in a choice of four power packages. In all
package styles, the batwing/power tab is at ground potential and needs
no isolation. These devices are also available for operation from -40°C
to +125°C. To order, change the suffix from 'S–' to 'K–'.
FEATURES
s ±2 A Continuous Output Current Rating
s 50 V Output Voltage Rating
s Internal PWM Current Control
s Fast and Slow Current-Decay Modes
s Sleep (Low Current Consumption) Mode
s Internal Transient Suppression Diodes
s Under-Voltage Lockout
s Internal Thermal Shutdown Circuitry
s Crossover-Current Protection
Always order by complete part number:
Part Number
A3952SB
A3952SEB
A3952SLB
A3952SW
Package
16-Pin DIP
28-Lead PLCC
16-Lead SOIC
12-Pin Power-Tab SIP
RθJA
43°C/W
42°C/W
67°C/W
36°C/W
RθJT
6.0°C/W
6.0°C/W
6.0°C/W
2.0°C/W




3952 pdf, 반도체, 판매, 대치품
3952
FULL-BRIDGE
PWM MOTOR DRIVER
Characteristic
Symbol Test Conditions
Min.
Limits
Typ. Max. Units
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
Reference Voltage Range
Reference Input Current
Reference Voltage Divider Ratio
Comparator Input Offset Voltage
PWM RC Fixed OFF Time
PWM Minimum ON Time
Propagation Delay Time
VCC
VIN(1)
VIN(0)
IIN(1)
IIN(0)
VREF
IREF
VIO
toff
ton(min)
tpd
Operating
VIN = 2.0 V
VIN = 0.8 V
Operating
VREF = 2.0 V
VREF = 15 V
VREF = 0 V
CT = 1000 pF, RT = 20 k
CT = 820 pF, RT 12 k
CT = 1200 pF, RT 12 k
IOUT = ±2.0 A, 50% EIN to 90% EOUT Transition:
ENABLE ON to Source ON
ENABLE OFF to Source OFF
ENABLE ON to Sink ON
ENABLE OFF to Sink OFF
PHASE Change to Source ON
PHASE Change to Source OFF
PHASE Change to Sink ON
PHASE Change to Sink OFF
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
UVLO Disable Threshold
UVLO Hysteresis
Logic Supply Current
(No Load)
tpd(pwm)
TJ
TJ
VCC(UVLO)
VCC(UVLO)
ICC(ON)
ICC(OFF)
ICC(BRAKE)
ICC(SLEEP)
Comparator Trip to Sink OFF
VENABLE = 0.8 V, VBRAKE = 2.0 V
VENABLE = 2.0 V, VMODE = 0.8 V
VBRAKE = 0.8 V
VENABLE = VMODE = VBRAKE = 2.0 V
NOTES: 1. Typical Data is for design information only.
2. Each driver is tested separately.
3. Negative current is defined as coming out of (sourcing) the specified device terminal.
4.5 5.0 5.5
2.0
– – 0.8
<1.0 20
<-2.0 -200
0 15
25 40 55
9.5 10.0 10.5
±1.0 ±10
18 20 22
1.7 3.0
2.5 3.8
2.9
0.7
2.4
0.7
2.9
0.7
2.4
0.7
0.8 1.5
165
15
3.15 3.50 3.85
300 400 500
20 30
12 18
26 40
3.0 5.0
V
V
V
µA
µA
V
µA
mV
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
°C
°C
V
mV
mA
mA
mA
mA
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

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3952 전자부품, 판매, 대치품
3952
FULL-BRIDGE
PWM MOTOR DRIVER
The following procedure can be used to evaluate the
worst-case slow-decay internal PWM load current regula-
tion in the system:
Set VREF to 0 volts. With the load connected and the PWM
current control operating in slow-decay mode, use an
oscilloscope to measure the time the output is low (sink
ON) for the output that is chopping. This is the typical
minimum ON time (ton(min)typ) for the device. CT then
should be increased until the measured value of ton(min) is
equal to ton(min)max) = 3.0 µs as specified in the electrical
characteristics table. When the new value of CT has been
set, the value of RT should be decreased so the value for
toff = RTCT (with the artificially increased value of CT) is
equal to 105% of the nominal design value. The worst-
case load current regulation then can be measured in the
system under operating conditions.
In applications utilizing both fast- and slow-decay
internal PWM modes, the performance of the slow-decay
current regulation should be evaluated per the above
procedure and a ton(min)max of 3.8 µs. This corresponds to
a CT value of 1200 pF, which is required to ensure suffi-
cient blanking during fast-decay internal PWM.
LOAD CURRENT REGULATION WITH EXTERNAL
PWM OF THE PHASE AND ENABLE INPUTS
The PHASE and ENABLE inputs can be pulse-width
modulated to regulate load current. Typical propagation
delays from the PHASE and ENABLE inputs to transitions
of the power outputs are specified in the electrical charac-
teristics table. If the internal PWM current control is used,
then the comparator blanking function is active during
phase and enable transitions. This eliminates false
tripping of the over-current comparator caused by switch-
ing transients (see RC Blankingabove).
ENABLE Pulse-Width Modulation
With the MODE input low, toggling the ENABLE input
turns ON and OFF the selected source and sink drivers.
The corresponding pair of flyback and ground clamp
diodes conduct after the drivers are disabled, resulting in
fast current decay. When the device is enabled, the
internal current control circuitry will be active and can be
used to limit the load current in a slow-decay mode.
For applications that PWM the ENABLE input, and
desire that the internal current limiting circuit function in the
fast-decay mode, the ENABLE input signal should be
inverted and connected to the MODE input. This prevents
the device from being switched into sleep mode when the
ENABLE input is low.
PHASE Pulse-Width Modulation
Toggling the PHASE terminal determines/controls
which sink/source pair is enabled, producing a load current
that varies with the duty cycle and remains continuous at
all times. This can have added benefits in bidirectional
brush dc servo motor applications as the transfer function
between the duty cycle on the phase input and the aver-
age voltage applied to the motor is more linear than in the
case of ENABLE PWM control (which produces a discon-
tinuous current at low current levels). See also, DC Motor
Applicationsbelow.
SYNCHRONOUS FIXED-FREQUENCY PWM
The internal PWM current-control circuitry of multiple
A3952Sdevices can be synchronized by using the simple
circuit shown in figure 3. A 555 IC can be used to gener-
ate the reset pulse/blanking signal (t1) and the period of
the PWM cycle (t2). The value of t1 should be a minimum
of 1.5 µs in slow-decay mode and 2 µs in fast-decay
mode. When used in this configuration, the RT and CT
components should be omitted. The PHASE and ENABLE
inputs should not be PWMed with this circuit configuration
due to the absence of a blanking function synchronous
with their transitions.
V CC
t2
RC 1
1N4001
2N2222
t
1
RC N
Dwg. EP-060
Figure 3 Synchronous Fixed-Frequency Control Circuit
MISCELLANEOUS INFORMATION
A logic high applied to both the ENABLE and MODE
terminals puts the device into a sleep mode to minimize
current consumption when not in use.
An internally generated dead time prevents crossover
currents that can occur when switching phase or braking.
Thermal protection circuitry turns OFF all drivers
should the junction temperature reach 165°C (typical).
This is intended only to protect the device from failures
due to excessive junction temperatures and should not

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관련 데이터시트

부품번호상세설명 및 기능제조사
3951

FULL-BRIDGE PWM MOTOR DRIVER

Allegro MicroSystems
Allegro MicroSystems
3952

FULL-BRIDGE PWM MOTOR DRIVER

Allegro MicroSystems
Allegro MicroSystems

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