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39VF040 PDF 데이터시트 ( Data , Function )

부품번호 39VF040 기능
기능 512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash
제조업체 Silicon Storage Technology Inc
로고 Silicon Storage Technology  Inc 로고 



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39VF040 데이터시트, 핀배열, 회로
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
SST39LF/VF512 / 010 / 020 / 0403.0 & 2.7V 512Kb / 1Mb / 2Mb / 4Mb (x8) MPF memories
FEATURES:
Data Sheet
• Organized as 64K x8 / 128K x8 / 256K x8 / 512K x8
• Single Voltage Read and Write Operations
– 3.0-3.6V for SST39LF512/010/020/040
– 2.7-3.6V for SST39VF512/010/020/040
Superior Reliability
Endurance: 100,000 Cycles (typical)
Greater than 100 years Data Retention
Low Power Consumption:
Active Current: 10 mA (typical)
Standby Current: 1 µA (typical)
Sector-Erase Capability
Uniform 4 KByte sectors
Fast Read Access Time:
45 ns for SST39LF512/010/020/040
55 ns for SST39LF020/040
70 and 90 ns for SST39VF512/010/020/040
Latched Address and Data
Fast Erase and Byte-Program:
Sector-Erase Time: 18 ms (typical)
Chip-Erase Time: 70 ms (typical)
Byte-Program Time: 14 µs (typical)
Chip Rewrite Time:
1 second (typical) for SST39LF/VF512
2 seconds (typical) for SST39LF/VF010
4 seconds (typical) for SST39LF/VF020
8 seconds (typical) for SST39LF/VF040
Automatic Write Timing
Internal VPP Generation
End-of-Write Detection
Toggle Bit
Data# Polling
CMOS I/O Compatibility
JEDEC Standard
Flash EEPROM Pinouts and command sets
Packages Available
32-lead PLCC
32-lead TSOP (8mm x 14mm)
48-ball TFBGA (6mm x 8mm) for 1 Mbit
PRODUCT DESCRIPTION
The SST39LF512/010/020/040 and SST39VF512/010/
020/040 are 64K x8, 128K x8, 256K x8 and 5124K x8
CMOS Multi-Purpose Flash (MPF) manufactured with
SSTs proprietary, high performance CMOS SuperFlash
technology. The split-gate cell design and thick oxide tun-
neling injector attain better reliability and manufacturability
compared with alternate approaches. The SST39LF512/
010/020/040 devices write (Program or Erase) with a 3.0-
3.6V power supply. The SST39VF512/010/020/040
devices write with a 2.7-3.6V power supply. The devices
conform to JEDEC standard pinouts for x8 memories.
Featuring high performance Byte-Program, the
SST39LF512/010/020/040 and SST39VF512/010/020/
040 devices provide a maximum Byte-Program time of 20
µsec. These devices use Toggle Bit or Data# Polling to indi-
cate the completion of Program operation. To protect
against inadvertent write, they have on-chip hardware and
Software Data Protection schemes. Designed, manufac-
tured, and tested for a wide spectrum of applications, they
are offered with a guaranteed endurance of 10,000 cycles.
Data retention is rated at greater than 100 years.
The SST39LF512/010/020/040 and SST39VF512/010/
020/040 devices are suited for applications that require
convenient and economical updating of program, configu-
ration, or data memory. For all system applications, they
significantly improves performance and reliability, while low-
ering power consumption. They inherently use less energy
during Erase and Program than alternative flash technolo-
gies. The total energy consumed is a function of the
applied voltage, current, and time of application. Since for
any given voltage range, the SuperFlash technology uses
less current to program and has a shorter erase time, the
total energy consumed during any Erase or Program oper-
ation is less than alternative flash technologies. These
devices also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet surface mount requirements, the SST39LF512/
010/020/040 and SST39VF512/010/020/040 devices are
offered in 32-lead PLCC and 32-lead TSOP packages. The
39LF/VF010 is also offered in a 48-ball TFBGA package.
See Figures 1 and 2 for pinouts.
©2001 Silicon Storage Technology, Inc.
S71150-03-000 6/01
395
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.




39VF040 pdf, 반도체, 판매, 대치품
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
X-Decoder
Memory Address Address Buffers & Latches
CE#
OE#
WE#
Control Logic
SuperFlash
Memory
Y-Decoder
I/O Buffers and Data Latches
DQ7 - DQ0
395 ILL B1.1
SST39LF/VF040 SST39LF/VF020 SST39LF/VF010 SST39LF/VF512
SST39LF/VF512 SST39LF/VF010 SST39LF/VF020 SST39LF/VF040
4 3 2 1 32 31 30
A7 A7 A7 A7 5
29 A14
A14
A14
A14
A6 A6 A6 A6 6
28 A13
A13
A13
A13
A5 A5 A5 A5 7
27 A8
A8
A8
A8
A4 A4
A4
A4 8
32-lead PLCC 26 A9
A9
A9
A9
A3 A3 A3 A3 9
25 A11
A11
A11
A11
A2 A2
A2
A2 10
Top View
24 OE#
OE#
OE#
OE#
A1 A1 A1 A1 11
23 A10
A10
A10
A10
A0 A0 A0 A0 12
22 CE#
CE#
CE#
CE#
DQ0
DQ0
DQ0
DQ0
13 21
14 15 16 17 18 19 20
DQ7
DQ7
DQ7
DQ7
395 ILL F02b.3
FIGURE 1: PIN ASSIGNMENTS FOR 32-LEAD PLCC
©2001 Silicon Storage Technology, Inc.
4
S71150-03-000 6/01 395

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39VF040 전자부품, 판매, 대치품
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
TABLE 4: SOFTWARE COMMAND SEQUENCE
Command
Sequence
Byte-Program
Sector-Erase
Chip-Erase
Software ID Entry4,5
Software ID Exit6
Software ID Exit6
1st Bus
Write Cycle
Addr1 Data
5555H AAH
5555H AAH
5555H AAH
5555H AAH
XXH F0H
5555H AAH
2nd Bus
Write Cycle
Addr1 Data
2AAAH 55H
2AAAH 55H
2AAAH 55H
2AAAH 55H
2AAAH 55H
3rd Bus
Write Cycle
Addr1 Data
5555H A0H
5555H 80H
5555H 80H
5555H 90H
5555H F0H
4th Bus
Write Cycle
Addr1 Data
BA2 Data
5555H AAH
5555H AAH
5th Bus
Write Cycle
Addr1 Data
2AAAH 55H
2AAAH 55H
1. Address format A14-A0 (Hex),
Address A15 can be VIL or VIH, but no other value, for the Command sequence for SST39LF/VF512.
Addresses A15-A16 can be VIL or VIH, but no other value, for the Command sequence for SST39LF/VF010.
Addresses A15-A17 can be VIL or VIH, but no other value, for the Command sequence for SST39LF/VF020.
Addresses A15-A18 can be VIL or VIH, but no other value, for the Command sequence for SST39LF/VF040.
2. BA = Program Byte address
3. SAX for Sector-Erase; uses AMS-A12 address lines
AMS = Most significant address
AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010, A17 for SST39LF/VF020, and A18 for SST39LF/VF040
4. The device does not remain in Software Product ID Mode if powered down.
5. With AMS-A1 =0; SST Manufacturers ID= BFH, is read with A0 = 0,
SST39LF/VF512 Device ID = D4H, is read with A0 = 1
SST39LF/VF010 Device ID = D5H, is read with A0 = 1
SST39LF/VF020 Device ID = D6H, is read with A0 = 1
SST39LF/VF040 Device ID = D7H, is read with A0 = 1
6. Both Software ID Exit operations are equivalent
6th Bus
Write Cycle
Addr1 Data
SAX3 30H
5555H 10H
T4.2 395
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under Absolute Maximum
Stress Ratingsmay cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to VDD + 1.0V
Voltage on A9 Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 13.2V
Package Power Dissipation Capability (Ta = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Output Short Circuit Current1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
1. Outputs shorted for no more than one second. No more than one output shorted at a time.
OPERATING RANGE FOR SST39LF512/010/020/040
Range
Commercial
Ambient Temp
0°C to +70°C
VDD
3.0-3.6V
OPERATING RANGE FOR SST39VF512/010/020/040
Range
Commercial
Industrial
Ambient Temp
0°C to +70°C
-40°C to +85°C
VDD
2.7-3.6V
2.7-3.6V
AC CONDITIONS OF TEST
Input Rise/Fall Time . . . . . . . . . . . . . . . 5 ns
Output Load
CL = 30 pF for SST39LF512/010/020/040
CL = 100 pF for SST39VF512/010/020/040
See Figures 13 and 14
©2001 Silicon Storage Technology, Inc.
7
S71150-03-000 6/01 395

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39VF040

512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology  Inc
Silicon Storage Technology Inc

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