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100350QC 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 100350QC은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 100350QC 기능
기능 Low Power Hex D-Type Latch
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100350QC 데이터시트, 핀배열, 회로
July 1988
Revised August 2000
100350
Low Power Hex D-Type Latch
General Description
The 100350 contains six D-type latches with true and com-
plement outputs, a pair of common Enables (Ea and Eb),
and a common Master Reset (MR). A Q output follows its D
input when both Ea and Eb are LOW. When either Ea or Eb
(or both) are HIGH, a latch stores the last valid data
present on its D input before Ea or Eb went HIGH. The MR
input overrides all other inputs and makes the Q outputs
LOW. All inputs have 50 kpull-down resistors.
Features
s 20% power reduction of the 100150
s 2000V ESD protection
s Pin/function compatible with 100150
s Voltage compensated operating range = −4.2V to 5.7V
Ordering Code:
Order Number Package Number
Package Description
100350PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100350QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Devises also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
Description
D0D5
Ea, Eb
MR
Data Inputs
Common Enable Inputs (Active LOW)
Asynchronous Master Reset Input
Q0Q5
Q0Q5
Data Outputs
Complementary Data Outputs
© 2000 Fairchild Semiconductor Corporation DS009884
28-Pin PLCC
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100350QC pdf, 반도체, 판매, 대치품
PLCC AC Electrical Characteristics
VEE = −4.2V to 5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
tS
tH
tPW(L)
tPW(H)
Propagation Delay
Dn to Output
(Transparent Mode)
Propagation Delay
Ea, Eb to Output
Propagation Delay
MR to Output
Transition Time
20% to 80%, 80% to 20%
Setup Time
D0D5
MR (Release Time)
Hold Time, D0D5
Pulse Width LOW
Ea, Eb
Pulse Width HIGH, MR
TC = 0°C
Min Max
0.50
1.20
0.75
0.90
0.35
1.65
1.90
1.10
0.90
1.50
0.30
2.00
2.00
TC = +25°C
Min Max
0.50
1.20
0.75
0.90
0.35
1.65
1.90
1.10
0.90
1.50
0.30
2.00
2.00
TC = +85°C
Min Max
0.50
1.30
0.75
0.90
0.35
1.85
1.90
1.10
Units Conditions
ns
Figures 1, 2
ns
ns Figures 1, 3
ns Figures 1, 2
0.90
1.50
0.30
2.00
2.00
ns Figures 3, 4
ns Figure 4
ns Figure 2
ns Figure 3
Test Circuit
Note:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50impedance lines
RT = 50terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 50to GND
CL = Fixture and stray capacitance 3 pF
FIGURE 1. AC Test Circuit
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100350QC 전자부품, 판매, 대치품
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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부품번호상세설명 및 기능제조사
100350QC

Low Power Hex D-Type Latch

Fairchild Semiconductor
Fairchild Semiconductor

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