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LV2209 데이터시트 PDF




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기능 Silicon Tuning Diodes
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LV2209 데이터시트, 핀배열, 회로
MMBV2101LT1 Series,
MV2105, MV2101, MV2109,
LV2205, LV2209
Silicon Tuning Diodes
6.8–100 pF, 30 Volts
Voltage Variable Capacitance Diodes
These devices are designed in popular plastic packages for the high
volume requirements of FM Radio and TV tuning and AFC, general
frequency control and tuning applications. They provide solid–state
reliability in replacement of mechanical tuning methods. Also
available in a Surface Mount Package up to 33 pF.
High Q
Controlled and Uniform Tuning Ratio
Standard Capacitance Tolerance – 10%
Complete Typical Design Curves
MAXIMUM RATINGS
Rating
Symbol
Reverse Voltage
VR
Forward Current
IF
Forward Power Dissipation
@ TA = 25°C
Derate above 25°C
MMBV21xx
PD
Value
30
200
225
1.8
Unit
Vdc
mAdc
mW
mW/°C
@ TA = 25°C
Derate above 25°C
MV21xx
LV22xx
Junction Temperature
Storage Temperature Range
TJ
Tstg
DEVICE MARKING
MMBV2101LT1 = M4G
MMBV2103LT1 = 4H
MMBV2105LT1 = 4U
MMBV2107LT1 = 4W
MMBV2108LT1 = 4X
MMBV2109LT1 = 4J
MV2101 = MV2101
MV2105 = MV2105
280
2.8
+150
–55 to +150
°C
°C
MV2109 = MV2109
LV2205 = LV2205
LV2209 = LV2209
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
Reverse Breakdown Voltage
V(BR)R
Vdc
(IR = 10 µAdc)
MMBV21xx, MV21xx
30 –
LV22xx
25 –
Reverse Voltage Leakage
Current
(VR = 25 Vdc, TA = 25°C)
Diode Capacitance
Temperature Coefficient
(VR = 4.0 Vdc, f = 1.0 MHz)
IR – – 0.1 µAdc
TCC
– 280 – ppm/°C
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31
Cathode
Anode
SOT–23
21
Cathode
Anode
TO–92
MARKING
DIAGRAM
3
1
2
TO–236AB, SOT–23
CASE 318–08
STYLE 8
XXX M
XXX = Device Code*
M = Date Code
* See Table
1
2
TO–226AC, TO–92
CASE 182
STYLE 1
XX
XXXX
YWW
XX = Device Code Line 1*
XXXX = Device Code Line 2*
M = Date Code
* See Table
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2001
October, 2001 – Rev. 3
1
Publication Order Number:
MMBV2101LT1/D




LV2209 pdf, 반도체, 판매, 대치품
MMBV2101LT1 Series, MV2105, MV2101, MV2109, LV2205, LV2209
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
0.037
0.95
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.035
0.9
0.079
2.0
0.031
0.8
SOT–23
inches
mm
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined by TJ(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT–23
package, PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
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LV2209 전자부품, 판매, 대치품
MMBV2101LT1 Series, MV2105, MV2101, MV2109, LV2205, LV2209
PACKAGE DIMENSIONS
TO–92 (TO–226AC)
CASE 182–06
ISSUE L
AB
SEATING
PLANE
P
R
L
K
XX
D
H
G
V
12
N
N
C
ÉÉDÉÉJ
SECTION X–X
STYLE 1:
PIN 1. ANODE
2. CATHODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND ZONE R IS
UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
INCHES
DIM MIN MAX
A 0.175 0.205
B 0.170 0.210
C 0.125 0.165
D 0.016 0.021
G 0.050 BSC
H 0.100 BSC
J 0.014 0.016
K 0.500 ---
L 0.250 ---
N 0.080 0.105
P --- 0.050
R 0.115 ---
V 0.135 ---
MILLIMETERS
MIN MAX
4.45 5.21
4.32 5.33
3.18 4.19
0.407 0.533
1.27 BSC
2.54 BSC
0.36 0.41
12.70 ---
6.35 ---
2.03 2.66
--- 1.27
2.93 ---
3.43 ---
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