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부품번호 FGH50N6S2 기능
기능 600V/ SMPS II Series N-Channel IGBT
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FGH50N6S2 데이터시트, 핀배열, 회로
August 2003
FGH50N6S2
600V, SMPS II Series N-Channel IGBT
General Description
The FGH50N6S2 is a Low Gate Charge, Low Plateau Volt-
age SMPS II IGBT combining the fast switching speed of
the SMPS IGBTs along with lower gate charge, plateau
voltage and avalanche capability (UIS). These LGC devices
shorten delay times, and reduce the power requirement of
the gate drive. These devices are ideally suited for high volt-
age switched mode power supply applications where low
conduction loss, fast switching times and UIS capability are
essential. SMPS II LGC devices have been specially de-
signed for:
• Power Factor Correction (PFC) circuits
• Full bridge topologies
• Half bridge topologies
• Push-Pull circuits
• Uninterruptible power supplies
• Zero voltage and zero current switching circuits
IGBT formerly Developmental Type TA49342
Features
• 100kHz Operation at 390V, 40A
• 200kHZ Operation at 390V, 25A
• 600V Switching SOA Capability
• Typical Fall Time. . . . . . . . . . . 90ns at TJ = 125oC
• Low Gate Charge . . . . . . . . . 70nC at VGE = 15V
• Low Plateau Voltage . . . . . . . . . . . . .6.5V Typical
• UIS Rated . . . . . . . . . . . . . . . . . . . . . . . . . 480mJ
• Low Conduction Loss
Package
TO-247
E
C
G
Symbol
C
G
COLLECTOR
(Back-Metal)
E
Device Maximum Ratings TC= 25°C unless otherwise noted
Symbol
Parameter
Ratings
Units
BVCES Collector to Emitter Breakdown Voltage
600 V
IC25 Collector Current Continuous, TC = 25°C
75 A
IC110
Collector Current Continuous, TC = 110°C
60 A
ICM Collector Current Pulsed (Note 1)
240 A
VGES
Gate to Emitter Voltage Continuous
±20 V
VGEM Gate to Emitter Voltage Pulsed
±30 V
SSOA Switching Safe Operating Area at TJ = 150°C, Figure 2
150A at 600V
EAS Pulsed Avalanche Energy, ICE = 30A, L = 1mH, VDD = 50V
480 mJ
PD Power Dissipation Total TC = 25°C
463 W
Power Dissipation Derating TC > 25°C
3.7 W/°C
TJ Operating Junction Temperature Range
-55 to 150
°C
TSTG
Storage Junction Temperature Range
-55 to 150
°C
CAUTION: Stresses above those listed in “Device Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
©2003 Fairchild Semiconductor Corporation
FGH50N6S2 RevA3




FGH50N6S2 pdf, 반도체, 판매, 대치품
Typical Performance Curves TJ = 25°C unless otherwise noted
2500
RG = 3, L = 200µH, VCE = 390V
2250
2000
1750
TJ = 25oC, TJ = 125oC, VGE = 10V
1500
1250
1000
750
500
250
0
0
TJ = 25oC, TJ = 125oC, VGE = 15V
10 20 30 40 50
ICE, COLLECTOR TO EMITTER CURRENT (A)
60
Figure 7. Turn-On Energy Loss vs Collector to
Emitter Current
1400
RG = 3, L = 200µH, VCE = 390V
1200
1000
800
TJ = 125oC, VGE = 10V, VGE = 15V
600
400
200
0
0
TJ = 25oC, VGE = 10V, VGE = 15V
10 20 30 40 50
ICE, COLLECTOR TO EMITTER CURRENT (A)
60
Figure 8. Turn-Off Energy Loss vs Collector to
Emitter Current
25
RG = 3, L = 200µH, VCE = 390V
20
TJ = 25oC, TJ = 125oC, VGE = 10V
15
TJ = 25oC, TJ = 125oC, VGE = 15V
10
5
0
0 10 20 30 40 50 60
ICE, COLLECTOR TO EMITTER CURRENT (A)
Figure 9. Turn-On Delay Time vs Collector to
Emitter Current
70
RG = 3, L = 200µH, VCE = 390V
60
50
40
TJ = 25oC, TJ = 125oC, VGE = 10V
30
20
10
0
0
TJ = 25oC, TJ = 125oC, VGE =15V
10 20 30 40 50
ICE, COLLECTOR TO EMITTER CURRENT (A)
60
Figure 10. Turn-On Rise Time vs Collector to
Emitter Current
100
RG = 3, L = 200µH, VCE = 390V
90
80
VGE = 10V, VGE = 15V, TJ = 125oC
70
125
RG = 3, L = 200µH, VCE = 390V
100
75 TJ = 125oC, VGE = 10V, VGE = 15V
60
50
40
0
VGE = 10V, VGE = 15V, TJ = 25oC
10 20 30 40 50
ICE, COLLECTOR TO EMITTER CURRENT (A)
60
Figure 11. Turn-Off Delay Time vs Collector to
Emitter Current
50
TJ = 25oC, VGE = 10V, VGE = 15V
25
0
10 20 30 40 50
ICE, COLLECTOR TO EMITTER CURRENT (A)
60
Figure 12. Fall Time vs Collector to Emitter
Current
©2003 Fairchild Semiconductor Corporation
FGH50N6S2 RevA3

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FGH50N6S2 전자부품, 판매, 대치품
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge
of energy through the devices. When handling these
devices, care should be exercised to assure that the
static charge built in the handlers body capacitance
is not discharged through the device. With proper
handling and application procedures, however,
IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with
virtually no damage problems due to electrostatic
discharge. IGBTs can be handled safely if the
following basic precautions are taken:
1. Prior to assembly into a circuit, all leads should be
kept shorted together either by the use of metal
shorting springs or by the insertion into conduc-
tive material such as ECCOSORBDLD26or
equivalent.
2. When devices are removed by hand from their
carriers, the hand being used should be grounded
by any suitable means - for example, with a
metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed
from circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-
voltage rating of VGEM. Exceeding the rated VGE
can result in permanent damage to the oxide layer
in the gate region.
6. Gate Termination - The gates of these devices
are essentially capacitors. Circuits that leave the
gate open-circuited or floating should be avoided.
These conditions can result in turn-on of the
device due to voltage buildup on the input
capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an
internal monolithic Zener diode from gate to
emitter. If gate protection is required an external
Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating
device performance for a specific application. Other
typical frequency vs collector current (ICE) plots are
possible using the information shown for a typical unit
in Figures 5, 6, 7, 8, 9 and 11. The operating
frequency plot (Figure 3) of a typical device shows
fMAX1 or fMAX2; whichever is smaller at each point.
The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held
to 10% of the on-state time for a 50% duty factor.
Other definitions are possible. td(OFF)I and td(ON)I are
defined in Figure 27. Device turn-off delay can
establish an additional frequency limiting condition for
an application other than TJM. td(OFF)I is important
when controlling output ripple under a lightly loaded
condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2).
The allowable dissipation (PD) is defined by
PD = (TJM - TC)/RθJC. The sum of device switching
and conduction losses must not exceed PD. A 50%
duty factor was used (Figure 3) and the conduction
losses (PC) are approximated by PC = (VCE x ICE)/2.
EON2 and EOFF are defined in the switching
waveforms shown in Figure 27. EON2 is the integral of
the instantaneous power loss (ICE x VCE) during turn-
on and EOFF is the integral of the instantaneous
power loss (ICE x VCE) during turn-off. All tail losses
are included in the calculation for EOFF; i.e., the
collector current equals zero (ICE = 0)
©2003 Fairchild Semiconductor Corporation
ECCOSORBDis a Trademark of Emerson and Cumming, Inc.
FGH50N6S2 RevA3

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