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FIN1027K8X 데이터시트 PDF




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부품번호 FIN1027K8X 기능
기능 3.3V LVDS 2-Bit High Speed Differential Driver
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FIN1027K8X 데이터시트, 핀배열, 회로
April 2001
Revised June 2003
FIN1027 FIN1027A
3.3V LVDS 2-Bit High Speed Differential Driver
General Description
This dual driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350 mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock or data.
The FIN1027 or FIN1027A can be paired with its compan-
ion receiver, the FIN1028, or with any other LVDS receiver.
Features
s Greater than 600Mbs data rate
s 3.3V power supply operation
s 0.5ns maximum differential pulse skew
s 1.5ns maximum propagation delay
s Low power dissipation
s Power-Off protection
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Flow-through pinout simplifies PCB layout
s 8-Lead SOIC, US8, and 8-terminal MLP
packages save space
Ordering Code:
Order Number
FIN1027M
FIN1027MX
FIN1027K8X
FIN1027MPX
(Preliminary)
FIN1027AM
FIN1027AMX
Package Number
Package Description
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
MAB08A
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
MLP08C
8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square
[TAPE and REEL]
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
© 2003 Fairchild Semiconductor Corporation DS500501
www.fairchildsemi.com




FIN1027K8X pdf, 반도체, 판매, 대치품
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Test Conditions
Min Typ Max
(Note 3)
Units
tPLHD
Differential Propagation Delay
LOW-to-HIGH
0.5 1.5 ns
tPHLD
Differential Propagation Delay
HIGH-to-LOW
0.5 1.5 ns
tTLHD
Differential Output Rise Time (20% to 80%) RL = 100 , CL = 10pF,
0.4
1.0 ns
tTHLD
Differential Output Fall Time (80% to 20%) See Figure 2 and Figure 3
0.4
1.0 ns
tSK(P)
Pulse Skew |tPLH - tPHL|
0.5 ns
tSK(LH),
tSK(HL)
Channel-to-Channel Skew
(Note 4)
0.3 ns
tSK(PP)
Part-to-Part Skew (Note 5)
1.0 ns
Note 3: All typical values are at TA = 25°C and with VCC = 3.3V.
Note 4: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-
tion.
Note 5: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
FIGURE 1. Differential Driver DC Test Circuit
Note A: All input pulses have frequency = 10 MHz, tR or tF = 2 ns
Note B: CL includes all probe and fixture capacitances
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
www.fairchildsemi.com
FIGURE 3. AC Waveforms
4

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FIN1027K8X 전자부품, 판매, 대치품
DC / AC Typical Performance Curves (Continued)
FIGURE 16. Differential Pulse Skew (tPLH - tPHL) vs.
Ambient Temperature
FIGURE 17. Transition Time vs.
Power Supply Voltage
FIGURE 18. Transition Time vs.
Ambient Temperature
7 www.fairchildsemi.com

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부품번호상세설명 및 기능제조사
FIN1027K8X

3.3V LVDS 2-Bit High Speed Differential Driver

Fairchild Semiconductor
Fairchild Semiconductor

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