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부품번호 | FIN1028MPX 기능 |
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기능 | 3.3V LVDS 2-Bit High Speed Differential Receiver | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
March 2001
Revised June 2003
FIN1028
3.3V LVDS 2-Bit High Speed Differential Receiver
General Description
This dual receiver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100 mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1028 can be paired with its companion driver, the
FIN1027, or any other LVDS driver.
Features
s Greater than 400Mbs data rate
s 3.3V power supply operation
s 0.4ns maximum differential pulse skew
s 2.5ns maximum propagation delay
s Low power dissipation
s Power-Off protection
s Fail safe protection for open-circuit, shorted and
terminated conditions
s Meets or exceeds the TIA/EIA-644 LVDS standard
s Flow-through pinout simplifies PCB layout
s 8-Lead SOIC and 8-terminal MLP packages save space
Ordering Code:
Order Number Package Number
Package Description
FIN1028M
(Note 1)
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1028MPX
(Preliminary)
MLP08C
8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square
[TAPE and REEL]
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Connection Diagrams
Pin Name
ROUT1, ROUT2
RIN1+, RIN2+
RIN1−, RIN2−
VCC
GND
Description
LVTTL Data Outputs
Non-inverting LVDS Inputs
Inverting LVDS Inputs
Power Supply
Ground
Pin Assignment for SOIC
Function Table
Input
RIN+
RIN+
LH
HL
Fail Safe Condition
H = HIGH Logic Level
L = LOW Logic Level
Fail Safe = Open, Shorted, Terminated
Outputs
ROUT
L
H
H
(Top View)
Terminal Assignments for MLP
© 2003 Fairchild Semiconductor Corporation DS500503
(Top Through View)
www.fairchildsemi.com
DC /AC Typical Performance Curves
FIGURE 3. Output High Voltage vs.
Power Supply Voltage
FIGURE 4. Output Low Voltage vs.
Power Supply Voltage
FIGURE 5. Output Short Circuit Current vs.
Power Supply Voltage
FIGURE 6. Power Supply Current vs.
Frequency
FIGURE 7. Power Supply Current vs.
Ambient Temperature
FIGURE 8. Differential Propagation Delay vs.
Power Supply Voltage
www.fairchildsemi.com
4
4페이지 Tape and Reel Specification
TAPE FORMAT for MLP
Ao
Package
Bo
D
D1
±0.10 ±0.10 ±0.05 Min
E
±0.1
F
±0.1
Ko
±0.1
P1
TYP
Po P2 T TC W
TYP ±0/05 TYP ±0.005 ±0.3
Wc
TYP
2x2
2.30 2.30 1.55 1.0 1.75 3.5 1.0 8.0 4.0 2.0 0.3 0.06 8.0 5.3
MLP Embossed Tape Dimensions (Dimensions are in millimeters)
REEL DIMENSIONS (millimeters)
Tape Width
8 mm
Dia A
Max
330
Dim B
Min
1.5
Dia C
+0.5/−0.2
13
Dia D
Min
20.2
Dim N
Min
178
Dim W1
+2/−0
8.4
Dim W2
Max
14.4
Dim W3
(LSL - USL)
7.9 ∼ 10.4
7 www.fairchildsemi.com
7페이지 | |||
구 성 | 총 9 페이지수 | ||
다운로드 | [ FIN1028MPX.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
FIN1028MPX | 3.3V LVDS 2-Bit High Speed Differential Receiver | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |