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PDF FIN1104 Data sheet ( Hoja de datos )
| Número de pieza | FIN1104 | |
| Descripción | LVDS 4 Port High Speed Repeater | |
| Fabricantes | Fairchild Semiconductor | |
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January 2002
Revised January 2003
FIN1104
LVDS 4 Port High Speed Repeater
General Description
This 4 port repeater is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The FIN1104 accepts and outputs LVDS levels
with a typical differential output swing of 330 mV which pro-
vides low EMI at ultra low power dissipation even at high
frequencies. The FIN1104 provides a VBB reference for AC
coupling on the inputs. In addition the FIN1104 can directly
accept LVPECL, HSTL, and SSTL-2 for translation to
LVDS.
Features
s Greater than 800 Mbps data rate
s 3.3V power supply operation
s 3.5 ps maximum random jitter and 135 ps maximum
deterministic jitter
s Wide rail-to-rail common mode range
s LVDS receiver inputs accept LVPECL, HSTL, and
SSTL-2 directly
s Ultra low power consumption
s 20 ps typical channel-to-channel skew
s Power off protection
s > 7.5 kV HBM ESD Protection
s Meets or exceeds the TIA/EIA-644-A LVDS standard
s Available in space saving 24-Lead TSSOP package
s Open circuit fail safe protection
s VBB reference output
Ordering Code:
Order Number Package Number
Package Description
FIN1104MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pin Descriptions
Connection Diagram
Pin Name
Description
RIN1+, RIN2+,
RIN3+, RIN4+
Non-inverting LVDS Input
RIN1−, RIN2−,
RIN3−, RIN4−
Inverting LVDS Input
DOUT1+, DOUT2+, Non-inverting Driver Output
DOUT3+, DOUT4+
DOUT1−, DOUT2−, Inverting Driver Output
DOUT3−, DOUT4−
EN Driver Enable Pin for All Output
EN
VCC
GND
VBB
Inverting Driver Enable Pin for all Outputs
Power Supply
Ground
Reference Voltage Output
© 2003 Fairchild Semiconductor Corporation DS500656
www.fairchildsemi.com
1 page  
FIGURE 4. AC Waveform
Note A: All LVTTL input pulses have frequency = 10MHz, tR or tF < = 2 ns
Note B: CL includes all probe and jig capacitances
FIGURE 5. Differential Driver Enable and Disable Circuit
FIGURE 6. Enable and Disable AC Waveforms
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet FIN1104.PDF ] | |
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