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PDF FM25160-S Data sheet ( Hoja de datos )

Número de pieza FM25160-S
Descripción 16Kb FRAM Serial Memory
Fabricantes ETC 
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No Preview Available ! FM25160-S Hoja de datos, Descripción, Manual

FM25160
16Kb FRAM Serial Memory
Features
16K bit Ferroelectric Nonvolatile RAM
Organized as 2,048 x 8 bits
High endurance 10 Billion (1010) read/writes
10 year data retention at 85° C
NoDelay™ write
Advanced high-reliability ferroelectric process
Fast Serial Peripheral Interface - SPI
Up to 2.1 MHz maximum bus frequency
Direct hardware replacement for EEPROM
Supports SPI Mode 0 (CPOL=0, CPHA=0)
Description
The FM25160 is a 16-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or FRAM is
nonvolatile but operates in other respects as a RAM.
It provides reliable data retention for 10 years while
eliminating the complexities, overhead, and system
level reliability problems caused by EEPROM and
other nonvolatile memories.
Unlike serial EEPROMs, the FM25160 performs
write operations at bus speed. No write delays are
incurred. Data is written to the memory array mere
hundreds of nanoseconds after it has been
successfully transferred to the device. The next bus
cycle may c7ommence immediately. In addition, the
product offers substantial write endurance compared
with other nonvolatile memories. The FM25160 is
capable of supporting up to 1E10 read/write cycles --
far more than most systems will require from a serial
memory.
These capabilities make the FM25160 ideal for
nonvolatile memory applications requiring frequent
or rapid writes. Examples range from data collection,
where the number of write cycles may be critical, to
demanding industrial controls where the long write
time of EEPROM can cause data loss.
The FM25160 provides substantial benefits to users
of serial EEPROM, in a hardware drop-in
replacement. The FM25160 uses the high-speed SPI
bus, which enhances the high-speed write capability
of FRAM technology. It is guaranteed over an
industrial temperature range of -40°C to +85°C.
Sophisticated Write Protection Scheme
Hardware protection
Software protection
Low Power Consumption
10 µA standby current
Industry Standard Configuration
Industrial temperature -40° C to +85° C
8-pin SOP or DIP
Pin Configuration
CS
SO
WP
VSS
VCC
HOLD
SCK
SI
Pin Names
/CS
SO
/WP
VSS
SI
SCK
/HOLD
VCC
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold
Supply Voltage 5V
Ordering Information
FM25160-P
8-pin plastic DIP
FM25160-S
8-pin SOP
This data sheet contains design specifications for product development.
These specifications may change in any manner without notice
12 May 2000
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000, Fax (719) 481-7058
www.ramtron.com
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1 page




FM25160-S pdf
Ramtron
Data Transfer
All data transfers to and from the FM25160 occur in
8-bit groups. They are synchronized to the clock
signal (SCK) and occur most significant bit (MSB)
first. Serial inputs are clocked in on the rising edge
of SCK. Outputs are driven on the falling edge of
SCK.
Command Structure
There are six commands called op-codes that can be
issued by the bus master to the FM25160. They are
listed in the table below. These op-codes control the
functions performed by the memory. They can be
divided into three categories. First, are commands
that have no subsequent operations. They perform a
single function such as to enable a write operation.
Second are commands followed by one byte, either in
or out. They operate on the status register Last are
commands for memory transactions followed by
address and one or more bytes of data.
Table 1. Op-code Commands
Name Description
WREN Set Write Enable Latch
WRDI Write Disable
RDSR Read Status Register
WRSR Write Status Register
READ Read Memory Data
WRITE Write Memory Data
Op-code value
00000110
00000100
00000101
00000001
00AAA011
00AAA010
Figure 4. WREN Bus Configuration
FM25160
WREN - Set Write Enable Latch
The FM25160 will power up with writes disabled.
The WREN command must be issued prior to any
write operation. Sending the WREN op-code will
allow the user to issue subsequent op-codes for write
operations. These include writing the status register
and writing the memory.
Sending the WREN op-code causes the internal
Write Enable Latch to be set. A flag bit in the status
register, called WEL, indicates the state of the latch.
WEL=1 indicates that writes are permitted.
Attempting to write the WEL bit in the status
register has no affect. Completing any write
operation will automatically clear the write enable
latch and prevent further writes without another
WREN command. Figure 4 below illustrates the
WREN command bus configuration.
WRDI - Write Disable
The WRDI command disables all write activity by
clearing the Write Enable Latch. The user can verify
that writes are disabled by reading the WEL bit in
the status register and verifying that WEL=0. Figure
5 below illustrates the WRDI command bus
configuration.
Figure 5. WRDI Bus Configuration
12 May 2000
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FM25160-S arduino
Ramtron
AC Parameters TA = -40° C to + 85° C, VCC = 4.5V to 5.5V unless otherwise specified
Symbol Parameter
Min Max Units
fCK SCK Clock Frequency
0
2.1 MHz
tCH Clock High Time
200
ns
tCL Clock Low Time
200
ns
tCSU
Chip Select Setup
240
ns
tCSH
Chip Select Hold
240
ns
tOD Output Disable
240 ns
tODV
Output Data Valid
200 ns
tOH Output Hold
0
ns
tD Deselect Time
240
ns
tR Data Rise Time
2.0 µS
tF Data Fall Time
2.0 µS
tH Data Hold Time
100
ns
tSU Data Setup Time
100
ns
tHS /Hold Setup Time
90
ns
tHH /Hold Hold Time
90
ns
tHZ /Hold Low to Hi-Z
100 ns
tLZ /Hold High to Data Active
100 ns
Notes
1. Rise and fall times measured between 10% and 90% of waveform.
Capacitance TA = 25° C , f=1.0 MHz, VCC = 5V
Symbol
Parameter
Max
CO Output capacitance (SDA)
8
CI Input capacitance
6
Units Notes
pF 1
pF 1
Notes
1. This parameter is periodically sampled and not 100% tested.
AC Test Conditions
Input Pulse Levels
Input rise and fall times
Input and output timing levels
VCC * 0.1 to VCC * 0.9
10 ns
VCC*0.5
Equivalent AC Load Circuit
FM25160
12 May 2000
11/14

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