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PDF FB2031 Data sheet ( Hoja de datos )
| Número de pieza | FB2031 | |
| Descripción | 9-bit latched/registered/pass-thru Futurebus transceiver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de FB2031 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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INTEGRATED CIRCUITS
FB2031
9-bit latched/registered/pass-thru
Futurebus+ transceiver
Product specification
IC19 Data Handbook
1995 May 25
Philips
Semiconductors
1 page  
Philips Semiconductors
9-bit latched/registered/pass-thru Futurebus+ transceiver
Product specification
FB2031
LOGIC DIAGRAM
OEB0 46
45
OEB1
OEA 47
A8 14
A7 12
10
TTL
8
6
4
2
52
A1
A0 50
LCAB 18
SEL0 20
SEL1 15
LCBA 16
DQ
E
DQ
Clk
MUX
A⇒ B
MUX
A⇐ B
DQ
E
DQ
Clk
MUX
A⇒ B
QQ DD
E
QD
Clk
MUX
A⇐ B
DQ
E
DQ
Clk
MUX
A⇒ B
QD
E
QD
Clk
MUX
A⇐ B
DQ
E
DQ
Clk
MUX
A⇒ B
QD
E
QD
Clk
MUX
A⇐ B
Decode
In Out
QD
E
QD
Clk
24 B8
26
B7
28
30
32 BTL
34
36
38 B1
40
B0
TMS
TCK
TDI
TDO
42
44
22
21
(JTAG Boundary Scan pins)
LOGIC GND
BUS GND
BIAS V
VCC
BG VCC
BG GND
= 1, 3, 5, 7, 9, 11, 13, 51
= 25, 27, 29, 31, 33, 35, 37, 39, 41
= 48
= 23, 43, 49
= 17
= 19
SG00061
1995 May 25
5
5 Page 
Philips Semiconductors
9-bit latched/registered/pass-thru Futurebus+ transceiver
Product specification
FB2031
AC ELECTRICAL CHARACTERISTICS (Commercial)
A PORT LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C, VCC = 5V,
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0 to +70°C,
VCC = 5V±10%,
CL = 50pF, RL = 500Ω
MIN MAX
UNIT
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tTLH
tTHL
tSK(o)
tSK(p)
Maximum clock frequency
Propagation delay (thru mode)
Bn to An
Propagation delay (transparent latch)
Bn to An
Propagation delay
LCBA to An
Propagation delay
SEL0 or SEL1 to An
Output enable time from High or Low
OEA to An
Output disable time to High or Low
OEA to An
Output transition time, An Port
10% to 90%, 90% to 10%
Output to output skew for multiple
channels1
Pulse skew 2
tPHL – tPLH MAX
Waveform 4
Waveform 1, 2
Waveform 1, 2
Waveform 1, 2
Waveform 1, 2
Waveform 5, 6
Waveform 5, 6
Test Circuit and
Waveforms
Waveform 3
Waveform 2
120 150
2.5 4.4 5.9
2.4 4.2 5.5
2.9 4.6 6.2
2.8 4.3 5.9
2.6 4.1 5.5
2.4 4.7 6.1
1.5 3.8 5.2
1.7 3.9 6.0
2.1 3.5 4.8
2.0 3.8 5.3
1.9 3.4 4.8
1.7 3.2 4.8
0.5 1.0
0.5 1.0
100
2.3
2.4
2.7
2.5
2.0
2.0
1.2
1.5
1.8
1.7
1.6
1.5
2.0
1.0
MHz
6.6
5.9
ns
7.0
6.5
ns
6.0
6.5
ns
6.0
6.5
ns
5.8
6.0
ns
5.4
5.4
ns
7.5
3.5
ns
1.5 ns
1.0 ns
NOTES:
1. tPNactual – tPMactual for any data input to output path compared to any other data input to output path where N and M are either LH or HL.
Skew times are valid only under same test conditions (temperature, VCC, loading, etc.).
2. tSK(p) is used to quantify duty cycle characteristics. In essence it compares the input signal duty cycle to the corresponding output signal
duty cycle (50MHz input frequency and 50% duty cycle, tested on data paths only).
1995 May 25
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet FB2031.PDF ] | |
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