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PDF FDC6321C Data sheet ( Hoja de datos )

Número de pieza FDC6321C
Descripción Dual N & P Channel / Digital FET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDC6321C Hoja de datos, Descripción, Manual

April 1999
FDC6321C
Dual N & P Channel , Digital FET
General Description
These dual N & P Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. This device has been designed
especially for low voltage applications as a replacement for
digital transistors in load switching applications. Since bias
resistors are not required this dual digital FET can replace
several digital transistors with different bias resistors.
Features
N-Ch 25 V, 0.68 A, RDS(ON) = 0.45 @ VGS= 4.5 V
P-Ch -25 V, -0.46 A, RDS(ON) = 1.1 @ VGS= -4.5 V.
Very low level gate drive requirements allowing direct
operation in 3 V circuits. VGS(th) < 1.0V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple dual NPN & PNP digital transistors.
SOT-23
SuperSOTTM-6
Mark:.321
D2
S1
D1
SuperSOTTM-8
SuperSOT TM-6
G2
S2
G1
SO-8
SOT-223
SOIC-16
43
52
61
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter
N-Channel
VDSS, VCC
VGSS, VIN
ID, IO
Drain-Source Voltage, Power Supply Voltage
Gate-Source Voltage,
Drain/Output Current - Continuous
- Pulsed
25
8
0.68
2
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
TJ,TSTG
ESD
Operating and Storage Tempature Ranger
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
0.9
0.7
-55 to 150
6
140
60
P-Channel
-25
-8
-0.46
-1.5
© 1999 Fairchild Semiconductor Corporation
Units
V
V
A
W
°C
kV
°C/W
°C/W
FDC6321C.RevB

1 page




FDC6321C pdf
Typical Electrical Characteristics: N-Channel (continued)
5
ID = 0.5A
4
3
VDS = 5V
15V
10V
2
1
0
0 0.4 0.8 1.2 1.6
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
2
150
100
50 Ciss
20
f = 1 MHz
10 VGS = 0V
Coss
Crss
5
0.1
0.5 1
2
5 10
25
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
5
1
0.3
0.1
0.03
0.01
0.1
RDS(ON) LIMIT
VGS = 4.5V
SINGLE PULSE
R θJA = See note 1b
TA = 25°C
1m1s00µs
10ms
DC 1s100ms
0.2
0.5 1
2
5 10 20
VDS , DRAI N-SOURCE VOLTAGE (V)
40
Figure 9. Maximum Safe Operating Area.
5
SINGLE PULSE
4
RθJA =See note 1b
TA = 25°C
3
2
1
0
0.01
0.1 1 10
SINGLE PULSE TIME (SEC)
100 300
Figure 10. Single Pulse Maximum Power
Dissipation.
FDC6321C.RevB

5 Page





FDC6321C arduino
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
effectiveness.
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Preliminary
Product Status
Formative or
In Design
First Production
No Identification Needed
Full Production
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

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