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부품번호 | FDD6035AL 기능 |
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기능 | N-Channel/ Logic Level/ PowerTrench MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 5 페이지수
September 2001
FDD6035AL
N-Channel, Logic Level, PowerTrench MOSFET
General Description
This N-Channel Logic level MOSFET is produced using
Fairchild Semiconductor's advanced PowerTrench process
that has been especially tailored to minimize the on state
resistance and yet maintain low gate charge for superior
switching performance.
Applications
• DC/DC converter
• Motor drives
Features
• 46 A, 30 V. RDS(ON) = 0.0125 Ω @ VGS = 10 V
RDS(ON) = 0.016 Ω @ VGS = 4.5 V.
• Low gate charge (17nC typical).
• Fast switching speed.
• High performance trench technology for extremely
low RDS(ON).
D
D
G
S
TO-252
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, Tstg
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
(Note 1)
(Note 1a)
Drain Current - Pulsed
Maximum Power Dissipation @ TC = 25oC
TA = 25oC
TA = 25oC
(Note 1)
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
G
S
Ratings
30
±20
46
12
100
50
2.8
1.3
-55 to +150
2.5
96
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDD6035AL
FDD6035AL
13’’
Tape width
16mm
2001 Fairchild Semiconductor Corporation
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500
FDD6035AL, Rev. A
Typical Characteristics (continued)
10
ID = 12A
8
VDS = 5V
15V
10V
6
4
2
0
0 5 10 15 20 25 30 35
Qg, GATE CHARGE (nC)
Figure 7. Gate-Charge Characteristics.
2500
2000
1500
1000
500
0
0
CISS
f = 1MHz
VGS = 0 V
COSS
CRSS
5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
100
RDS(ON) LIMIT
10
1
100µs
1ms
10ms
100ms
1S
10S
DC
0.1
0.01
0.01
VGS = 10V
SINGLE PULSE
RθJA = 96oC/W
TA = 25oC
0.1
1
10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
60
SINGLE PULSE
RθJA = 96oC/W
TA = 25oC
40
20
0
0.01
0.1 1 10 100
SINGLE PULSE TIME (SEC)
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
0.001
D = 0.5
0.2
0.1
0.05
0.01
0.02
Single Pulse
0.0001
0.0001
0.001
0.01
0.1
t1 , TIME (sec)
1
R θJA (t) = r(t) * R θJA
R θJA = 96°C/W
P(pk)
t1
t2
TJ - TA = P * R θJA (t)
Duty Cycle, D = t 1 / t 2
10 100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
FDD6035AL, Rev. A
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부품번호 | 상세설명 및 기능 | 제조사 |
FDD6035AL | N-Channel/ Logic Level/ PowerTrench MOSFET | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |