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Número de pieza | FDD6685 | |
Descripción | 30V P-Channel PowerTrench MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de FDD6685 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! February 2004
FDD6685
30V P-Channel PowerTrench® MOSFET
General Description
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
Features
• –40 A, –30 V. RDS(ON) = 20 mΩ @ VGS = –10 V
RDS(ON) = 30 mΩ @ VGS = –4.5 V
• Fast switching speed
• High performance trench technology for extremely
low RDS(ON)
• High power and current handling capability
• Qualified to AEC Q101
D
G
S
G
S
TO-252
D
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @TC=25°C
(Note 3)
@TA=25°C
(Note 1a)
Pulsed, PW ≤ 100µs (Note 1b)
PD
Power Dissipation for Single Operation
(Note 1)
(Note 1a)
TJ, TSTG
(Note 1b)
Operating and Storage Junction Temperature Range
Ratings
–30
±25
–40
–11
–100
52
3.8
1.6
–55 to +175
Units
V
V
A
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
2.9
°C/W
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W
RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 96 °C/W
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry.
For a copy of the requirements, see AEC Q101 at http://www.aecouncil.com/
Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.
All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
certification.
©2004 Fairchild Semiconductor Corporation
FDD6685 Rev D (W)
1 page Typical Characteristics
10
ID = -11.0 A
8
6
4
VDS = 10V
30V
20V
2
0
0 5 10 15 20 25 30
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
1000
100
RDS(ON) LIMIT
10
1
VGS = 10V
SINGLE PULSE
0.1 RθJA = 96oC/W
TA = 25oC
100µs
1ms
10ms
100ms
1
10s
DC
0.01
0.01
0.10 1.00 10.00
VDS, DRAIN-SOURCE VOLTAGE (V)
100.00
Figure 9. Maximum Safe Operating Area.
2400
1800
1200
f = 1MHz
VGS = 0 V
Ciss
600
Coss
Crss
0
0 5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
100
SINGLE PULSE
RθJA = 96°C/W
80 TA = 25°C
60
40
20
0
0.01
0.1
1 10
t1, TIME (sec)
100
Figure 10. Single Pulse Maximum
Power Dissipation.
1000
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
0.001
0.001
0.01
0.1
1
t1, TIME (sec)
10
RθJA(t) = r(t) * RθJA
RθJA = 96 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
100 1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDD6685 Rev D (W)
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet FDD6685.PDF ] |
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