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FDG6303N 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 FDG6303N은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 FDG6303N 기능
기능 Dual N-Channel/ Digital FET
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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FDG6303N 데이터시트, 핀배열, 회로
July 1999
FDG6303N
Dual N-Channel, Digital FET
General Description
These dual N-Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. This device has been
designed especially for low voltage applications as a
replacement for bipolar digital transistors and small
signal MOSFETs.
Features
25 V, 0.50 A continuous, 1.5 A peak.
RDS(ON) = 0.45 @ VGS= 4.5 V,
RDS(ON) =0.60 @ VGS= 2.7 V.
Very low level gate drive requirements allowing direct
operation in 3 V circuits (VGS(th) < 1.5 V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
Compact industry standard SC70-6 surface
mount package.
SC70-6
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
S2
G2
D1 .03
SC70-6
D2
S1 G1
1 or 4 *
2 or 5
3 or 6
* The pinouts are symmetrical; pin 1 and 4 are interchangeable.
Units inside the carrier can be of either orientation and will not affect the functionality of the device.
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain/Output Current - Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1)
TJ,TSTG Operating and Storage Temperature Range
ESD Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100 pF / 1500 )
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient
FDG6303N
25
8
0.5
1.5
0.3
-55 to 150
6.0
415
6 or 3
5 or 2
4 or 1 *
Units
V
V
A
W
°C
kV
°C/W
FDG6303N Rev.E1




FDG6303N pdf, 반도체, 판매, 대치품
Typical Electrical Characteristics (continued)
5
ID = 0.5A
4
VDS = 5V
10V
15V
3
2
1
0
0 0.4 0.8 1.2 1.6
Qg , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
2
200
70
Ciss
30
Coss
10
f = 1 MHz
VGS = 0V
Crss
3
0.1 0.3
12
5 10
25
V DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
3
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
RDS(ON) LIMIT
VGS = 4.5V
SINGLE PULSE
RθJA = 415 °C/W
TA= 25°C
1s
10s
DC
1ms
10ms
100ms
12
5 10
VDS , DRAI N-SOURCE VOLTAGE (V)
25
40
Figure 9. Maximum Safe Operating Area.
50
SINGLE PULSE
40 RθJA=415°C/W
TA= 25°C
30
20
10
0
0.0001
0.001
0.01 0.1
1
SINGLE PULSE TIME (SEC)
10
200
Figure 10. Single Pulse Maximum Power
Dissipation.
1
0.5 D = 0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.002
0.0001
0.001
0.01
0.1
t1, TIME (sec)
1
R θJA (t) = r(t) * R θJA
R θJA =415 °C/W
P(pk)
t1
t2
TJ - TA = P * R θJA (t)
Duty Cycle, D = t1/ t 2
10 100 200
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1.
Transient thermal response will change depending on the circuit board design.
FDG6303N Rev.E1

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FDG6303N 전자부품, 판매, 대치품
SC70-6 Tape and Reel Data and Package Dimensions, continued
SC70-6 (FS PKG Code 76)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0055
September 1998, Rev. A1

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