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부품번호 | FDN361AN 기능 |
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기능 | N-Channel/ Logic Level/ PowerTrench | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 8 페이지수
April 1999
FDN361AN
N-Channel, Logic Level, PowerTrenchΤΜ
General Description
This N-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor's PowerTrench process that has
been especially tailored to minimize the on-state resistance
and yet maintain low gate charge for superior switching
performance.
Applications
• DC/DC converter
• Load switch
• Motor drives
Features
• 1.8 A, 30 V. RDS(on) = 0.100 Ω @ VGS = 10 V
RDS(on) = 0.150 Ω @ VGS = 4.5 V.
• Low gate charge ( 2.1nC typical ).
• Fast switching speed.
• High performance trench technology for extremely
low RDS(on).
• High power version of industry standard SOT-23
package. Identical pin out to SOT-23 with
30% higher power handling capability.
DD
S
SuperSOTTM-3
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
Parameter
Drain-Source Voltage
Gate-Source Voltage - Continuous
Drain Current - Continuous
- Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
(Note 1b)
TJ, Tstg
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
361
FDN361AN
7’’
GS
FDN361AN
30
±20
1.8
8
0.5
0.46
-55 to +150
250
75
Units
V
V
A
W
°C
°C/W
°C/W
Tape width
8mm
Quantity
3000 units
1998 Fairchild Semiconductor Corporation
FDN361AN, Rev. C
Typical Characteristics (continued)
10
ID = 1 .8 A
8
6
VD S = 5 V
10 V
15 V
4
2
0
01234
Q g , GATE CHARGE (nC)
Figure 7. Gate-Charge Characteristics.
30
10
3 RD S(ON) LIMIT
1
0. 3
VGS = 10 V
0.1 SINGLE PUL SE
1ms
10 ms
100
101ss
ms
DC
0. 03
RθJ A=270 °C/W
TA = 2 5°C
0. 01
0.1 0.2
0.5 1
2
5 10 20 30
VD S ,DRAIN-SOURCE VOLTAG E (V)
50
Figure 9. Maximum Safe Operating Area.
500
200 C i ss
100
50 Co ss
f = 1 MHz
20 VGS = 0 V
Crss
10
0. 1
0. 2
0.5 1
2
5 10
VD S, DRAIN TO SOURCE VO LTAGE (V)
30
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
40
RθJA =27 0° C/W
TA = 25°C
30
20
10
0
0. 0001
0. 001
0. 01 0.1 1 10
SI NGLE PULSE TI ME (SEC)
100 300
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.5
0.2
0.1
0.0 5
0.0 2
0.0 1
0 . 00 5
D = 0.5
0.2
0.1
0 0. 5
0 0. 2
0 0. 1
Si n g l e P u l s e
0 . 00 2
0 . 00 1
0 .00 0 1
0 . 00 1
0.0 1
0.1
t1, TIM E (s ec )
1
R θJ A (t) = r(t) * RθJ A
RθJ A = 270 °C /W
P(p k )
t1
t2
TJ - TA =P * RθJ A (t)
Du
t
y
Cy
c
le,
D=
t
1
/
t2
10 100 300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
FDN361AN, Rev. C
4페이지 SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT™-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
7페이지 | |||
구 성 | 총 8 페이지수 | ||
다운로드 | [ FDN361AN.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
FDN361AN | N-Channel/ Logic Level/ PowerTrench | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |