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FDS9435A 데이터시트 PDF




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부품번호 FDS9435A 기능
기능 Single P-Channel Enhancement Mode Field Effect Transistor
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FDS9435A 데이터시트, 핀배열, 회로
May 1999
FDS9435A
Single P-Channel Enhancement Mode Field Effect Transistor
GeneralDescription
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
-5.3 A, -30 V, RDS(ON) = 0.045 @ VGS = -10 V,
RDS(ON) = 0.075 @ VGS = - 4.5 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D
D
D
D
F9D4S35A
SO-8
pin 1
S
G
S
S
Absolute Maximum Ratings
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
TA = 25oC unless otherwise noted
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1999 Fairchild Semiconductor Corporation
5
6
7
8
FDS9435A
-30
-20
- 5.3
-50
2.5
1.2
1
-55 to 150
50
25
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
FDS9435A Rev.C




FDS9435A pdf, 반도체, 판매, 대치품
Typical Electrical Characteristics (continued)
10
I D = -5.3A
8
6
VDS= -5V
-10V
-15V
4
2
0
0 5 10 15 20
Q g , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
2000
1000
500
Ciss
Coss
200
100 f = 1 MHz
VGS = 0 V
Crss
50
0.1
0.3
13
10
-VDS , DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
100
10 RDS(ON) LIMIT
1
VGS = -10V
0.1 SINGLE PULSE
R θJA = 125°C/W
TAA= 25°C
0.01
0.1 0.2
0.5
1
2
100us
1ms
10ms
100ms
1s
D1C0s
5 10 20
-VDS , DRAIN-SOURCE VOLTAGE (V)
50
Figure 9. Maximum Safe Operating Area.
50
SINGLE PULSE
40 R θJA= 125°C/W
TA = 25°C
30
20
10
0
0.0001 0.001
0.01 0.1 1 10
SINGLE PULSE TIME (SEC)
100 300
Figure 10. Single Pulse Maximum Power
Dissipation.
1
0.5 D = 0.5
0.3
0.2 0.2
0.1
0.05
0.03
0.02
0.01
0.0001
0.1
0.05
0.02
0.01
Single Pulse
0.001
0.01
0.1
t 1, TIME (sec)
1
RθJA (t) = r(t) * R θJA
R θJA = 125 °C/W
P(pk)
t1
t2
TJ - TA = P * R θJA (t)
Duty Cycle, D = t 1/ t 2
10 100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS9435A Rev.C

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FDS9435A 전자부품, 판매, 대치품
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A

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FDS9435A

Single P-Channel Enhancement Mode Field Effect Transistor

Fairchild Semiconductor
Fairchild Semiconductor

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