Datasheet.kr   

EPM7256AE 데이터시트 PDF




Altera Corporation에서 제조한 전자 부품 EPM7256AE은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 EPM7256AE 자료 제공

부품번호 EPM7256AE 기능
기능 Programmable Logic Device
제조업체 Altera Corporation
로고 Altera Corporation 로고


EPM7256AE 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

EPM7256AE 데이터시트, 핀배열, 회로
October 2002, ver. 4.3
Includes
® MAX 7000AE
MAX 7000A
Programmable Logic
Device
Data Sheet
Features...
f
High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
Pin-compatible with the popular 5.0-V MAX 7000S devices
High-density PLDs ranging from 600 to 10,000 usable gates
Extended temperature range
For information on in-system programmable 5.0-V MAX 7000 or 2.5-V
MAX 7000B devices, see the MAX 7000 Programmable Logic Device Family
Data Sheet or the MAX 7000B Programmable Logic Device Family Data Sheet.
Altera Corporation
DS-M7000A-4.3
1




EPM7256AE pdf, 반도체, 판매, 대치품
MAX 7000A Programmable Logic Device Data Sheet
The MAX 7000A architecture supports 100% transistor-to-transistor logic
(TTL) emulation and high-density integration of SSI, MSI, and LSI logic
functions. It easily integrates multiple devices including PALs, GALs, and
22V10s devices. MAX 7000A devices are available in a wide range of
packages, including PLCC, BGA, FineLine BGA, Ultra FineLine BGA,
PQFP, and TQFP packages. See Table 3 and Table 4.
Table 3. MAX 7000A Maximum User I/O Pins Note (1)
Device
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
44-Pin PLCC 44-Pin TQFP 49-Pin Ultra 84-Pin PLCC
FineLine
BGA (2)
36 36
36 36 41
68
68
100-Pin
TQFP
68
84
84
84
84
100-Pin
FineLine
BGA (3)
68
84
84
84
Table 4. MAX 7000A Maximum User I/O Pins Note (1)
Device
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
144-Pin TQFP 169-Pin Ultra 208-Pin PQFP 256-Pin BGA 256-Pin FineLine
FineLine BGA (2)
BGA (3)
100 100
100 100
100
120 164 164
120 164 164
120
176 212
212
Notes to tables:
(1) When the IEEE Std. 1149.1 (JTAG) interface is used for in-system programming or boundary-scan testing, four I/O
pins become JTAG pins.
(2) All Ultra FineLine BGA packages are footprint-compatible via the SameFrameTM feature. Therefore, designers can
design a board to support a variety of devices, providing a flexible migration path across densities and pin counts.
Device migration is fully supported by Altera development tools. See “SameFrame Pin-Outs” on page 15 for more
details.
(3) All FineLine BGA packages are footprint-compatible via the SameFrame feature. Therefore, designers can design a
board to support a variety of devices, providing a flexible migration path across densities and pin counts. Device
migration is fully supported by Altera development tools. See “SameFrame Pin-Outs” on page 15 for more details.
4 Altera Corporation

4페이지










EPM7256AE 전자부품, 판매, 대치품
Figure 1. MAX 7000A Device Block Diagram
INPUT/GCLK1
INPUT/OE2/GCLK2
INPUT/OE1
MAX 7000A Programmable Logic Device Data Sheet
INPUT/GCLRn
6 or 10 Output Enables (1)
2 to 16 I/O
2 to 16 LAB A
I/O 2 to 16
Control
Block
Macrocells
1 to 16
36
16
6 or 10 Output Enables (1)
LAB B 2 to 16
36 Macrocells
17 to 32
16
2 to 16 I/O
Control
Block
2 to 16 I/O
2 to 16 I/O
6
2 to 16 LAB C
2 to 16
PIA
2 to 16
LAB D 2 to 16
6
I/O 2 to 16
Control
Block
Macrocells
33 to 48
36
16
36 Macrocells
49 to 64
16
2 to 16 I/O
Control
Block
2 to 16 I/O
6
2 to 16
2 to 16
6
Note:
(1) EPM7032AE, EPM7064AE, EPM7128A, EPM7128AE, EPM7256A, and EPM7256AE devices have six output enables.
EPM7512AE devices have 10 output enables.
Logic Array Blocks
The MAX 7000A device architecture is based on the linking of
high-performance LABs. LABs consist of 16-macrocell arrays, as shown in
Figure 1. Multiple LABs are linked together via the PIA, a global bus that
is fed by all dedicated input pins, I/O pins, and macrocells.
Each LAB is fed by the following signals:
36 signals from the PIA that are used for general logic inputs
Global controls that are used for secondary register functions
Direct input paths from I/O pins to the registers that are used for fast
setup times
Altera Corporation
7

7페이지


구       성 총 30 페이지수
다운로드[ EPM7256AE.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
EPM7256AE

Programmable Logic Device

Altera Corporation
Altera Corporation

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵