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PDF DS90LV028A Data sheet ( Hoja de datos )

Número de pieza DS90LV028A
Descripción 3V LVDS Dual CMOS Differential Line Receiver
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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June 1998
DS90LV028A
3V LVDS Dual CMOS Differential Line Receiver
General Description
The DS90LV028A is a dual CMOS differential line receiver
designed for applications requiring ultra low power dissipa-
tion, low noise and high data rates. The device is designed to
support data rates in excess of 400 Mbps (200 MHz) utilizing
Low Voltage Differential Signaling (LVDS) technology.
The DS90LV028A accepts low voltage (350 mV typical) dif-
ferential input signals and translates them to 3V CMOS out-
put levels. The receiver also supports open, shorted and ter-
minated (100) input fail-safe. The receiver output will be
HIGH for all fail-safe conditions. The DS90LV028A has a
flow-through design for easy PCB layout.
The DS90LV028A and companion LVDS line driver provide a
new alternative to high power PECL/ECL devices for high
speed point-to-point interface applications.
Features
n >400 Mbps (200 MHz) switching rates
n 50 ps differential skew (typical)
n 0.1 ns channel-to-channel skew (typical)
n 2.5 ns maximum propagation delay
n 3.3V power supply design
n Flow-through pinout
n Power down high impedance on LVDS inputs
n Low Power design (18mW @ 3.3V static)
n Interoperable with existing 5V LVDS networks
n Accepts small swing (350 mV typical) differential signal
levels
n Supports open, short and terminated input fail-safe
n Conforms to ANSI/TIA/EIA-644 Standard
n Industrial temperature operating range
(−40˚C to +85˚C)
n Available in SOIC package
Connection Diagram
Functional Diagram
Dual-in-Line
DS100077-1
Order Number DS90LV028ATM
See NS Package Number M08A
Truth Table
INPUTS
[RIN+] − [RIN−]
VID 0.1V
VID −0.1V
Full Fail-safe
OPEN/SHORT
or Terminated
DS100077-2
OUTPUT
ROUT
H
L
H
© 1998 National Semiconductor Corporation DS100077
www.national.com

1 page




DS90LV028A pdf
Applications Information (Continued)
When choosing cable and connectors for LVDS it is impor-
tant to remember:
Use controlled impedance media. The cables and connec-
tors you use should have a matched differential impedance
of about 100. They should not introduce major impedance
discontinuities.
Balanced cables (e.g. twisted pair) are usually better than
unbalanced cables (ribbon cable, simple coax) for noise re-
duction and signal quality. Balanced cables tend to generate
less EMI due to field canceling effects and also tend to pick
up electromagnetic radiation a common-mode (not differen-
tial mode) noise which is rejected by the receiver.
For cable distances < 0.5M, most cables can be made to
work effectively. For distances 0.5M d 10M, CAT 3 (cat-
egory 3) twisted pair cable works well, is readily available
and relatively inexpensive.
Typical Performance Curves
Pin Descriptions
Pin No.
1, 4
2, 3
6, 7
8
5
Name
RIN-
RIN+
ROUT
VCC
GND
Description
Inverting receiver input pin
Non-inverting receiver input pin
Receiver output pin
Power supply pin, +3.3V ± 0.3V
Ground pin
Ordering Information
Operating
Temperature
−40˚C to +85˚C
Package Type/
Number
SOP/M08A
Order Number
DS90LV028ATM
Output High Voltage vs
Power Supply Voltage
Output Low Voltage vs
Power Supply Voltage
Output Short Circuit Current vs
Power Supply Voltage
DS100077-7
Differential Transition Voltage vs
Power Supply Voltage
DS100077-8
DS100077-9
5
DS100077-10
www.national.com

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