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부품번호 | AT94K40AL-25BQC 기능 |
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기능 | 5K - 40K Gates of AT40K FPGA with 8-bit Microcontroller/ up to 36K Bytes of SRAM and On-chip JTAG ICE | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 30 페이지수
Features
• Monolithic Field Programmable System Level Integrated Circuit (FPSLIC™)
– AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core,
Extensive Data and Instruction SRAM and JTAG ICE
• 5,000 to 40,000 Gates of Patented SRAM-based AT40K FPGA with FreeRAM™
– 2 - 18.4 Kbits of Distributed Single/Dual Port FPGA User SRAM
– High-performance DSP Optimized FPGA Core Cell
– Dynamically Reconfigurable In-System – FPGA Configuration Access Available
On-chip from AVR Microcontroller Core to Support Cache Logic® Designs
– Very Low Static and Dynamic Power Consumption – Ideal for Portable and
Handheld Applications
• Patented AVR Enhanced RISC Architecture
– 120+ Powerful Instructions – Most Single Clock Cycle Execution
– High-performance Hardware Multiplier for DSP-based Systems
– Approaching 1 MIPS per MHz Performance
– C Code Optimized Architecture with 32 x 8 General-purpose Internal Registers
– Low-power Idle, Power-save and Power-down Modes
– 100 µA Standby and Typical 2-3 mA per MHz Active
• Up to 36 Kbytes of Dynamically Allocated Instruction and Data SRAM
– Up to 16 Kbytes x 16 Internal 15 ns Instructions SRAM
– Up to 16 Kbytes x 8 Internal 15 ns Data SRAM
• JTAG (IEEE std. 1149.1 Compliant) Interface
– Extensive On-chip Debug Support
– Limited Boundary-scan Capabilities According to the JTAG Standard (AVR Ports)
• AVR Fixed Peripherals
– Industry-standard 2-wire Serial Interface
– Two Programmable Serial UARTs
– Two 8-bit Timer/Counters with Separate Prescaler and PWM
– One 16-bit Timer/Counter with Separate Prescaler, Compare, Capture
Modes and Dual 8-, 9- or 10-bit PWM
• Support for FPGA Custom Peripherals
– AVR Peripheral Control – 16 Decoded AVR Address Lines Directly Accessible
to FPGA
– FPGA Macro Library of Custom Peripherals
• 16 FPGA Supplied Internal Interrupts to AVR
• Up to Four External Interrupts to AVR
• 8 Global FPGA Clocks
– Two FPGA Clocks Driven from AVR Logic
– FPGA Global Clock Access Available from FPGA Core
• Multiple Oscillator Circuits
– Programmable Watchdog Timer with On-chip Oscillator
– Oscillator to AVR Internal Clock Circuit
– Software-selectable Clock Frequency
– Oscillator to Timer/Counter for Real-time Clock
• VCC: 3.0V - 3.6V
• 3.3V 33 MHz PCI-compliant FPGA I/O
– 20 mA Sink/Source High-performance I/O Structures
– All FPGA I/O Individually Programmable
• High-performance, Low-power 0.35µ CMOS Five-layer Metal Process
• State-of-the-art Integrated PC-based Software Suite including Co-verification
• 5V I/O Tolerant
5K - 40K Gates
of AT40K FPGA
with 8-bit
Microcontroller,
up to 36K Bytes
of SRAM and
On-chip
JTAG ICE
AT94K Series
Field
Programmable
System Level
Integrated
Circuit
Rev. 1138F–FPSLI–06/02
1
The embedded AVR core achieves throughputs approaching 1 MIPS per MHz by executing
powerful instructions in a single-clock cycle, and allows system designers to optimize power
consumption versus processing speed. The AVR core is based on an enhanced RISC archi-
tecture that combines a rich instruction set with 32 general-purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code-efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers at the same clock frequency. The AVR executes out of on-
chip SRAM. Both the FPGA configuration SRAM and the AVR instruction code SRAM can be
automatically loaded at system power-up using Atmel’s in-system programmable (ISP) AT17
Series EEPROM Configuration Memories.
State-of-the-art FPSLIC design tools, System Designer™, were developed in conjunction with
the FPSLIC architecture to help reduce overall time-to-market by integrating microcontroller
development and debug, FPGA development and Place and Route, and complete system
co-verification in one easy-to-use software tool.
4 AT94K Series FPSLIC
Rev. 1138F–FPSLI–06/02
4페이지 AT94K Series FPSLIC
Figure 4. Busing Plane (One of Five)
= AT40K Core Cell
= Local/local or Express/express Turn Point
= Row Repeater
= Column
Rev. 1138F–FPSLI–06/02
7
7페이지 | |||
구 성 | 총 30 페이지수 | ||
다운로드 | [ AT94K40AL-25BQC.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
AT94K40AL-25BQC | 5K - 40K Gates of AT40K FPGA with 8-bit Microcontroller/ up to 36K Bytes of SRAM and On-chip JTAG ICE | ATMEL Corporation |
AT94K40AL-25BQI | 5K - 40K Gates of AT40K FPGA with 8-bit Microcontroller/ up to 36K Bytes of SRAM and On-chip JTAG ICE | ATMEL Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |