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ATF20V8B-25PI 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 ATF20V8B-25PI은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 ATF20V8B-25PI 자료 제공

부품번호 ATF20V8B-25PI 기능
기능 High- Performance EE PLD
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


ATF20V8B-25PI 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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ATF20V8B-25PI 데이터시트, 핀배열, 회로
Features
Industry Standard Architecture
– Emulates Many 24-Pin PALs®
– Low Cost Easy-to-Use Software Tools
High-Speed Electrically Erasable Programmable Logic Devices
– 7.5 ns Maximum Pin-to-Pin Delay
Several Power Saving Options
Device
ATF20V8B
ICC, Stand-By
50 mA
ICC, Active
55 mA
ATF20V8BQ
35 mA
40 mA
ATF20V8BQL
5 mA
20 mA
CMOS and TTL Compatible Inputs and Outputs
Input and I/O Pull-Up Resistors
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High Reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Commercial and Industrial Temperature Ranges
Dual-in-Line and Surface Mount Packages in Standard Pinouts
Block Diagram
High-
Performance
EE PLD
ATF20V8B
Pin Configurations
Pin Name
CLK
I
I/O
OE
*
VCC
Function
Clock
Logic Inputs
Bidirectional Buffers
Output Enable
No Internal Connection
+5V Supply
TSSOP Top View
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 IN
22 I/O
21 I/O
20 I/O
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 IN
13 OE/IN
DIP/SOIC
PLCC Top View
Rev. 0407E–05/98
1




ATF20V8B-25PI pdf, 반도체, 판매, 대치품
AC Waveforms(1)
Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
AC Characteristics(1)
-7 -10
Symbol Parameter
Min Max Min Max
tPD
Input or Feedback to
Non-Registered Output
8 outputs switching
1 output switching
3 7.5 3 10
7
tCF Clock to Feedback
tCO Clock to Output
tS
Input or Feedback
Setup Time
36
2527
5 7.5
tH
tP
tW
FMAX
tEA
Hold Time
Clock Period
Clock Width
External Feedback 1/(tS + tCO)
Internal Feedback 1/(tS + tCF)
No Feedback 1/(tP)
Input to Output
Enable — Product Term
00
8 12
46
100 68
125 74
125 83
3 9 3 10
tER
Input to Output
Disable —Product Term
2 9 2 10
tPZX
tPXZ
Note:
OE pin to Output Enable
262
OE pin to Output Disable
1.5 6 1.5
1. See ordering information for valid part numbers and speed grades.
10
10
-15
Min Max
3 15
8
2 10
12
0
16
8
45
50
62
3 15
2 15
2 15
1.5 15
-25
Min Max
3 25
10
2 12
15
0
24
12
37
40
41
3 20
2 20
2 20
1.5 20
Units
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
4 ATF20V8B

4페이지










ATF20V8B-25PI 전자부품, 판매, 대치품
ATF20V8B
Compiler Mode Selection
Registered
ABEL, Atmel-ABEL
P20V8R
CUPL
LOG/iC
G20V8MS
GAL20V8_R(1)
OrCAD-PLD
“Registered”
PLDesigner
P20V8
Tango-PLD
G20V8
Note: 1. Only applicable for version 3.4 or lower.
Complex
P20V8C
G20V8MA
GAL20V8_C7(1)
“Complex”
P20V8
G20V8
Simple
P20V8
G20V8
GAL20V8_C8(1)
“Simple”
P20V8
G20V8
Auto Select
P20V8
G20V8A
GAL20V8
GAL20V8
P20V8
G20V8
ATF20V8B Registered Mode
PAL Device Emulation / PAL Replacement
The registered mode is used if one or more registers are
required. Each macrocell can be configured as either a reg-
istered or combinatorial output or I/O, or as an input. For a
registered output or I/O, the output is enabled by the OE
pin, and the register is clocked by the CLK pin. Eight prod-
uct terms are allocated to the sum term. For a combinato-
rial output or I/O, the output enable is controlled by a
product term, and seven product terms are allocated to the
sum term. When the macrocell is configured as an input,
the output enable is permanently disabled.
Any register usage will make the compiler select this mode.
The following registered devices can be emulated using
this mode:
20R8 20RP8
20R6 20RP6
20R4 20RP4
Registered Mode Operation
7

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