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ATMEGA103L 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 ATMEGA103L은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 ATMEGA103L 자료 제공

부품번호 ATMEGA103L 기능
기능 8-Bit Microcontroller
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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ATMEGA103L 데이터시트, 핀배열, 회로
Features
Utilizes the AVR® RISC Architecture
AVR – High-performance and Low-power RISC Architecture
– 121 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers + Peripheral Control Registers
– Up to 6 MIPS Throughput at 6 MHz
Data and Nonvolatile Program Memory
– 128K Bytes of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
– 4K Bytes Internal SRAM
– 4K Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– Programming Lock for Flash Program and EEPROM Data Security
– SPI Interface for In-System Programming
Peripheral Features
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– Programmable Serial UART
– Master/Slave SPI Serial Interface
– Real-time Counter (RTC) with Separate Oscillator
– Two 8-bit Timer/Counters with Separate Prescaler and PWM
– Expanded 16-bit Timer/Counter System with Separate Prescaler, Compare,
Capture Modes and Dual 8-, 9-, or 10-bit PWM
– Programmable Watchdog Timer with On-chip Oscillator
– 8-channel, 10-bit ADC
Special Microcontroller Features
– Low-power Idle, Power-save and Power-down Modes
– Software Selectable Clock Frequency
– External and Internal Interrupt Sources
Specifications
– Low-power, High-speed CMOS Process Technology
– Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
– Active: 5.5 mA
– Idle Mode: 1.6 mA
– Power-down Mode: < 1 µA
I/O and Packages
– 32 Programmable I/O Lines, 8 Output Lines, 8 Input Lines
– 64-lead TQFP
Operating Voltages
– 2.7 - 3.6V for ATmega103L
– 4.0 - 5.5V for ATmega103
Speed Grades
– 0 - 4 MHz for ATmega103L
– 0 - 6 MHz for ATmega103
8-bit
Microcontroller
with 128K Bytes
In-System
Programmable
Flash
ATmega103
ATmega103L
Note: Not recommended in new
designs.
Rev. 0945I–AVR–02/07
1




ATMEGA103L pdf, 반도체, 판매, 대치품
Block Diagram
Figure 1. The ATmega103(L) Block Diagram
PF0 - PF7
PA0 - PA7
PC0 - PC7
VCC
GND
AVCC
AGND
AREF
PORTF BUFFERS
ANALOG MUX
ADC
PORTA DRIVER/BUFFERS
PORTC DRIVERS
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
8-BIT DATA BUS
INTERNAL
OSCILLATOR
OSCILLATOR
PROGRAM
COUNTER
PROGRAM
FLASH
STACK
POINTER
SRAM
WATCHDOG
TIMER
MCU CONTROL
REGISTER
OSCILLATOR
TIMING AND
CONTROL
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
STATUS
REGISTER
PROGRAMMING
LOGIC
SPI UART
XTAL1
XTAL1
TOSC2
TOSC1
RESET
ALE
WR
RD
PEN
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
PORTE DRIVER/BUFFERS
PORTB DRIVER/BUFFERS
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
PORTD DRIVER/BUFFERS
VCC
GND
PE0 - PE7
PB0 - PB7
PD0 - PD7
4 ATmega103(L)
0945I–AVR–02/07

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ATMEGA103L 전자부품, 판매, 대치품
External Clock
Timer Oscillator
ATmega103(L)
To drive the device from an external clock source, XTAL2 should be left unconnected
while XTAL1 is driven as shown in Figure 3.
Figure 3. External Clock Drive Configuration
NC
EXTERNAL
OSCILLATOR
SIGNAL
XTAL2
XTAL1
GND
For the Timer Oscillator pins, TOSC1 and TOSC2, the crystal is connected directly
between the pins. No external capacitors are needed. The Oscillator is optimized for use
with a 32,768 Hz watch crystal. Applying an external clock source to TOSC1 is not
recommended.
0945I–AVR–02/07
7

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