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PDF ATTL7554BP Data sheet ( Hoja de datos )

Número de pieza ATTL7554BP
Descripción L7554 Low-Power SLIC
Fabricantes Agere Systems 
Logotipo Agere Systems Logotipo



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Data Sheet
March 1997
L7554 Low-Power SLIC
Features
s Low active power (typical 165 mW during on-hook
transmission)
s Sleep state for low idle power (76 mW)
s Quiet Tip/Ring polarity reversal
s Supports meter pulse injection
s Spare op amp for meter pulse filtering
s –24 V to –72 V power supply operation
s Distortion-free on-hook transmission
s Convenient operating states:
— Forward powerup
— Polarity reversal powerup
— Forward low-power scan
— Polarity reversal low-power scan
— Ground start
— Disconnect (high impedance)
s Adjustable supervision functions:
— Off-hook detector with longitudinal rejection
— Ground key detector
— Ring trip detector
s Independent, adjustable, dc and ac parameters:
— dc feed resistance
— Loop current limit
— Termination impedance
s Thermal protection
Description
This electronic subscriber loop interface circuit
(SLIC) is optimized for low-power consumption while
providing an extensive set of features.
Quiet polarity reversal is possible because the ac
path is uninterrupted during transition.
The L7554 includes the ground start state and a
summing node for meter pulse injection to 2.2 Vrms.
A spare, uncommitted op amp is included for meter
pulse filtering.
The device is being offered in two versions, based
upon maximum battery. The L7554AP is guaranteed
to –60 V, and the L7554BP is guaranteed to –72 V.
The device is available in a 44-pin PLCC package. It
is built by using a 90 V complementary bipolar
(CBIC) process.

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ATTL7554BP pdf
Data Sheet
March 1997
L7554 Low-Power SLIC
Pin Information (continued)
Table 1. Pin Descriptions (continued)
Pin Symbol Type
Description
20 VITR
O Transmit ac Output Voltage. This output is a voltage that is directly proportional to the
differential ac Tip/Ring current.
21 ICM
I Common-Mode Current Sense. To program ring ground sense threshold, connect a
resistor to VCC and connect a capacitor to AGND to filter 50/60 Hz. If unused, the pin can
be left unconnected.
22 RGDET
O Ring Ground Detect. When high, this open-collector output indicates the presence of a
ring ground. To use, connect a 100 kresistor to VCC.
23 B0
I State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2.
24 AGND — Analog Signal Ground.
25 AGND — Analog Signal Ground.
26 DCR
I dc Resistance for Low Loop Currents. Leave open for dc feed resistance of 118 , or
short to DCOUT for 618 . Intermediate values can be set by a simple resistor divider
from DCOUT to ground with the tap at DCR.
27 BGND — Battery Ground. Ground return for the battery supply.
29 VTX O This output is a voltage that is directly proportional to the differential Tip/Ring current.
30 PT I/O Protected Tip. The output of the tip driver amplifier and input to loop sensing. Connect to
loop through overvoltage protection.
31 RTSN
I Ring Trip Sense Negative. Connect this pin to the ringing generator signal through a
high-value resistor.
32 RTSP
I Ring Trip Sense Positive. Connect this pin to the ring relay and the ringer series resistor
through a high-value resistor.
33 NRDET O Ring Trip Detector Output. When low, this logic output indicates that ringing is tripped.
34 NLC O Loop Detector Output. When low, this logic output indicates an off-hook condition.
35 B2
I State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2.
36 B1 I/O State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2.
37 XMT O Transmit ac Output Voltage. The output of the uncommitted operational amplifier.
38 SN
I Summing Node. The inverting input of the uncommitted operational amplifier. A resistor
or network to XMT sets the gain.
39 FB1
I Forward Battery Slowdown. A 0.1 µF capacitor from FB1 to AGND and from FB2 to
AGND will ramp the polarity reversal transition for added flexibility in applications requiring
quiet polarity reversal. If not needed, the pin can be left open.
40 FB2
I Forward Battery Slowdown. A 0.1 µF capacitor from FB2 to AGND and from FB1 to
AGND will ramp the polarity reversal transition for added flexibility in applications requiring
quiet polarity reversal. If not needed, the pin can be left open.
Lucent Technologies Inc.
5

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ATTL7554BP arduino
Data Sheet
March 1997
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 9. Logic Inputs and Outputs
All outputs except RGDET are open-collector with internal pull-up resistor. RGDET is open-collector without inter-
nal pull-up.
Parameter
Input Voltages
Low Level (permissible range)
High Level (permissible range)
Input Currents
Low Level (VCC = 5.25 V, VI = 0.4 V)
High Level (VCC = 5.25 V, VI = 2.4 V)
Output Voltages (open-collector with internal pull-up
resistor)
Low Level (VCC = 4.75 V, IOL = 360 µA)
High Level (VCC = 4.75 V, IOH = –20 µA)
Symbol
VIL
VIH
IIL
IIH
Min Typ Max Unit
–0.5 0.4
0.7
2.0 2.4 VCC
V
V
— –115 –200 µA
–60 –100
µA
VOL 0 0.2 0.4 V
VOH 2.4 — VCC V
Ring Trip Requirements
s Ringing signal:
— Voltage, minimum 35 Vrms, maximum 100 Vrms.
— Frequency, 17 Hz to 23 Hz.
— Crest factor, 1.4 to 2.
s Ringing trip:
100 ms (typical), 250 ms (VBAT = –33 V, loop
length = 530 ).
s Pretrip:
— The circuits in Figure 3 will not cause ringing trip.
200
TIP
SWITCH CLOSES < 12 ms
6 µF
TIP
10 k
2 µF
100
TIP
Figure 3. Ring Trip Circuits
RING
RING
RING
12-2572 (C)
Lucent Technologies Inc.
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