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PDF FOA51001B1 Data sheet ( Hoja de datos )
| Número de pieza | FOA51001B1 | |
| Descripción | Semiconductor Solutions for High Speed Communi cation and Fiber OpticApplications | |
| Fabricantes | Infineon Technologies AG | |
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PRODUCT BRIEF
Semiconductor Solutions for
High Speed Communication
and Fiber Optic Applications
FOA41001B1 16:1
Multiplexer with Clock Multiplication Unit Chip
MUX 9.95 - 10.7 Gbit/s, 3.3 V
FOA51001B1 1:16
Demultiplexer with Clock and Data Recovery Chip
DEMUX 9.95 - 10.7 Gbit/s, 3.3 V
The transceiver chipset (MUX + DEMUX) is compliant with the
Optical Internetworking Forum (OIF)-Physical Layer Group's
OIF99.102 recommendation. These devices offer differential inter-
faces at 622 Mbit/s without external components. The multiplexer
integrates a low noise LC VCO, meets Bellcore's OC-192 jitter
requirements and incorporates pseudo 8-Bit FIFO (First in, First out).
The companion FOA51001B1 10 Gbit/s 1:16 demultiplexer encom-
passes a complete CDR with high data system sensitivity to enhance
the system margin. Each device runs on a single 3.3 V power supply,
with consumption of approximately 1.25 W and incorporates an
integrated low noise Phase Locked Loop (PLL).
Features
F OA 41 0 0 / 51 0 0s Loss of lock detection
s Industry's lowest power
s Compliant to the Optical
s Tunable center frequency
consumption of typical 2.5 W
Internetworking Forum
from 9.95 GHz to 10.7 GHz
for MUX and DEMUX Chipset
(OIF)-Physical Layer Group's
(1.2 W for MUX;
OIF99.102 recommendation
s Jitter performance compliant
with ITU-T and Bellcore
s Internal low phase noise
LC-VCO
s Differential input voltage
Typical Applications
s Fiber optics telecom and
datacom applications
s SONET/SDH OC-192/STM-64
with and without FEC
1.3 W for DEMUX)
s Real differential LVDS
interface
(100 Ω termination on-chip)
s MUX only: advanced FIFO
architecture (±2.4 ns drift
range: 40 mV - 800 mV
tolerance at 9.95 Gbit/s)
(pk-pk)
Main Advantages
s Two reference clock options: s Data rate from 9.95 Gbit/s
155 MHz or 622 MHz
to 10.7 Gbit/s
s MUX only: Two receiver clock s Single supply voltage 3.3 V
modes, 311 MHz or 622 MHz
s Adjustment of sampling
threshold and phase
Packing
Type
MUX 16:1
MUX 16:1
DEMUX 1:16
DEMUX 1:16
Sales Code
FOA41001B1
FOA41002B1
FOA51001B1
FOA51002B1
Package
P-HBGA-92
Bare Die
P-HBGA-92
Bare Die
FOA4100/5100
MUX/DEMUX
9.95 - 10.7 Gbit/s, 3.3 V
Never stop thinking.
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| Número de pieza | Descripción | Fabricantes |
| FOA51001B1 | Semiconductor Solutions for High Speed Communi cation and Fiber OpticApplications | Infineon Technologies AG |
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