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FQB13N50 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 FQB13N50은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 FQB13N50 기능
기능 500V N-Channel MOSFET
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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FQB13N50 데이터시트, 핀배열, 회로
FQB13N50 / FQI13N50
500V N-Channel MOSFET
March 2001
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power
factor correction, and electronic lamp ballast based on half
bridge.
Features
• 12.5A, 500V. RDS(on) = 0.43@VGS = 10 V
• Low gate charge ( typical 45 nC).
• Low Crss ( typical 25 pF).
• Fast switching.
• 100% avalanche tested.
• Improved dv/dt capability.
DD
!
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
G!
◀▲
!
S
FQB13N50 / FQI13N50
500
12.5
7.9
50
± 30
810
12.5
17
4.5
3.13
170
1.35
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
-- 0.74 °C/W
-- 40 °C/W
-- 62.5 °C/W
©2001 Fairchild Semiconductor Corporation
Rev. A, March 2001




FQB13N50 pdf, 반도체, 판매, 대치품
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 Notes:
1. V =0V
2.
I
GS
=
250
μ
A
D
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
102 is Limited by R DS(on)
100 µs 10 µs
1 ms
101
10 ms
DC
100
10-1
100
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
V , Drain-Source Voltage [V]
DS
103
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. V = 10 V
GS
2. ID = 6.7 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
15
12
9
6
3
0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
D =0.5
1 0 -1
0.2
0.1
0 .0 5
1 0 -2
0 .0 2
0 .0 1
sin gle p u ls e
N otes :
1. Z θ JC(t) = 0.74 /W M ax.
2. D uty F actor, D = t1/t2
3 . T JM - T C = P DM * Z θ JC(t)
PDM
t1
t2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [se c ]
Figure 11. Transient Thermal Response Curve
101
©2001 Fairchild Semiconductor Corporation
Rev. A, March 2001

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FQB13N50 전자부품, 판매, 대치품
Package Dimensions
9.90 ±0.20
D2PAK
4.50 ±0.20
1.30
+0.10
–0.05
1.27 ±0.10
2.54 TYP
0.80 ±0.10
2.54 TYP
10.00 ±0.20
0.10 ±0.15
2.40 ±0.20
0°~3°
0.50
+0.10
–0.05
10.00 ±0.20
(8.00)
(4.40)
(2XR0.45)
©2001 Fairchild Semiconductor Corporation
0.80 ±0.10
Rev. A, March 2001

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