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부품번호 FQD7N10 기능
기능 100V N-Channel MOSFET
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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FQD7N10 데이터시트, 핀배열, 회로
FQD7N10 / FQU7N10
100V N-Channel MOSFET
December 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as audio
amplifiers, high efficiency switching DC/DC converters, and
DC motor control.
Features
• 5.8A, 100V, RDS(on) = 0.35@VGS = 10 V
• Low gate charge ( typical 5.8 nC)
• Low Crss ( typical 10 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8from case for 5 seconds
D
!
"
!"
G!
"
"
!
S
FQD7N10 / FQU7N10
100
5.8
3.67
23.2
± 25
50
5.8
2.5
6.0
2.5
25
0.2
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Typ Max Units
-- 5.0 °C/W
-- 50 °C/W
-- 110 °C/W
Rev. A2, December 2000




FQD7N10 pdf, 반도체, 판매, 대치품
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
Notes :
1. VGS = 0 V
2. ID = 250 μA
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
102
Operation in This Area
is Limited by R DS(on)
101
100
10-1
100
100 µs
1 ms
10 ms
DC
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101
V , Drain-Source Voltage [V]
DS
102
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 2.9 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
6
5
4
3
2
1
0
25 50 75 100 125 150
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
D =0.5
1 00 0 .2
0 .1
0 .05
1 0 -1
0 .02
0 .01
s in g le p u ls e
N ote s :
1.
Z
θ
(t)
JC
=
5.0
/W
M ax.
2. D u ty F actor, D =t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Z
θ
(t)
JC
PDM
t1
t2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
101
©2000 Fairchild Semiconductor International
Rev. A2, December 2000

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FQD7N10 전자부품, 판매, 대치품
Package Dimensions
(0.50)
6.60 ±0.20
5.34 ±0.30
(4.34)
DPAK
(0.50)
2.30 ±0.10
0.50 ±0.10
MAX0.96
2.30TYP
[2.30±0.20]
0.76 ±0.10
2.30TYP
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
(2XR0.25)
©2000 Fairchild Semiconductor International
0.76 ±0.10
Rev. A2, December 2000

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