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FQP13N10 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 FQP13N10
기능 100V N-Channel MOSFET
제조업체 Fairchild Semiconductor
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FQP13N10 데이터시트, 핀배열, 회로
FQP13N10
100V N-Channel MOSFET
January 2001
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as audio
amplifier, high efficiency switching DC/DC converters, and
DC motor control.
Features
• 12.8A, 100V, RDS(on) = 0.18@VGS = 10 V
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 20 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
GD S
TO-220
FQP Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
D
!
"
!"
G!
"
"
!
S
FQP13N10
100
12.8
9.05
51.2
± 25
95
12.8
6.5
6.0
65
0.43
-55 to +175
300
Typ Max
-- 2.31
0.5 --
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A1, January 2001




FQP13N10 pdf, 반도체, 판매, 대치품
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
Notes :
1. VGS = 0 V
2. ID = 250 μA
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
102 is Limited by R DS(on)
100 µs
1 ms
101 10 ms
DC
100
10-1
100
Notes :
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
101
V , Drain-Source Voltage [V]
DS
102
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
Notes :
1. VGS = 10 V
2. ID = 6.4 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
15
12
9
6
3
0
25 50 75 100 125 150 175
TC, Case Temperature []
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D = 0.5
0 .2
0 .1
0 .05
0 .02
0 .01
sin g le p u ls e
N o tes :
1.
Z
θ
(t)
JC
=
2 .3 1
/W
M ax.
2 . D uty F acto r, D = t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Z
θ
(t)
JC
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A1, January 2001

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FQP13N10 전자부품, 판매, 대치품
Package Dimensions
9.90 ±0.20
(8.70)
ø3.60 ±0.10
TO-220
4.50 ±0.20
1.30
+0.10
–0.05
1.27 ±0.10
2.54TYP
[2.54 ±0.20]
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
0.50
+0.10
–0.05
2.40 ±0.20
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A1, January 2001

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