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부품번호 | FQP6N45 기능 |
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기능 | 450V N-Channel MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
FQP6N45
450V N-Channel MOSFET
January 2001
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply,
electronic lamp ballast based on half bridge.
Features
• 6.2A, 450V, RDS(on) = 1.1Ω @VGS = 10 V
• Low gate charge ( typical 16 nC)
• Low Crss ( typical 11 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
GD S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
D
!
"
!"
G!
"
"
!
S
FQP6N45
450
6.2
3.9
25
± 30
350
6.2
9.8
4.5
98
0.78
-55 to +150
300
Typ Max
-- 1.28
0.5 --
-- 62.5
©2000 Fairchild Semiconductor International
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. A1, January 2001
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 ※Notes:
1. V =0V
2.
I
GS
=
250
μA
D
0.8
-100
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
102
Operation in This Area
is Limited by R DS(on)
101
100
10-1
100
100 µs
1 ms
10 ms
DC
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
V , Drain-Source Voltage [V]
DS
103
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
※ Notes :
1. V = 10 V
GS
2. ID = 3.1 A
-50 0
50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
7
6
5
4
3
2
1
0
25 50 75 100 125 150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs. Case Temperature
100
D =0 .5
0 .2
1 0 -1
0 .1
0 .0 5
0 .0 2
0 .0 1
s in g le p u ls e
※ N otes :
1.
Z
θ
(t)
JC
=
1.2 8
℃ /W
M ax.
2 . D u t y F a c t o r , D = t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Zθ
(t)
JC
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t , S q u a re W a v e P u ls e D u ra tio n [s e c ]
1
101
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
4페이지 Package Dimensions
9.90 ±0.20
(8.70)
ø3.60 ±0.10
TO-220
4.50 ±0.20
1.30
+0.10
–0.05
1.27 ±0.10
2.54TYP
[2.54 ±0.20]
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
0.50
+0.10
–0.05
2.40 ±0.20
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
7페이지 | |||
구 성 | 총 8 페이지수 | ||
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