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부품번호 | FQP7N10 기능 |
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기능 | 100V N-Channel MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 8 페이지수
FQP7N10
100V N-Channel MOSFET
December 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as audio
amplifiers, high efficiency switching DC/DC converters, and
DC motor control.
Features
• 7.3A, 100V, RDS(on) = 0.35Ω @VGS = 10 V
• Low gate charge ( typical 5.8 nC)
• Low Crss ( typical 10 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
GD S
TO-220
FQP Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
D
!
"
!"
G!
"
"
!
S
FQP7N10
100
7.3
5.15
29.2
± 25
50
7.3
4.0
6.0
40
0.27
-55 to +175
300
Typ Max
-- 3.75
0.5 --
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A2, December2000
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
※ Notes :
1. VGS = 0 V
2. ID = 250 μA
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
102
Operation in This Area
is Limited by R DS(on)
100 µs
101 1 ms
10 ms
DC
100
10-1
100
※ Notes :
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
101
V , Drain-Source Voltage [V]
DS
102
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
※ Notes :
1. VGS = 10 V
2. ID = 3.65 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
8
6
4
2
0
25 50 75 100 125 150 175
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D = 0.5
0 .2
0 .1
0 .05
0 .02
0 .01
sin g le p u ls e
※ N o tes :
1.
Z
θ
(t)
JC
=
3 .7 5
℃ /W
M ax.
2 . D uty F acto r, D = t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Z
θ
(t)
JC
PDM
t1
t2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
101
©2000 Fairchild Semiconductor International
Rev. A2, December2000
4페이지 Package Dimensions
9.90 ±0.20
(8.70)
ø3.60 ±0.10
TO-220
4.50 ±0.20
1.30
+0.10
–0.05
1.27 ±0.10
2.54TYP
[2.54 ±0.20]
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
0.50
+0.10
–0.05
2.40 ±0.20
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A2, December2000
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부품번호 | 상세설명 및 기능 | 제조사 |
FQP7N10 | 100V N-Channel MOSFET | Fairchild Semiconductor |
FQP7N10L | 100V LOGIC N-Channel MOSFET | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |