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부품번호 | FQU2N80 기능 |
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기능 | 800V N-Channel MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 9 페이지수
FQD2N80 / FQU2N80
800V N-Channel MOSFET
September 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
• 1.8A, 800V, RDS(on) = 6.3Ω @VGS = 10 V
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 5.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
D
!
"
35
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
FQD2N80 / FQU2N80
800
1.8
1.14
7.2
± 30
180
1.8
5.0
4.0
2.5
50
0.4
-55 to +150
300
Typ Max
-- 2.5
-- 50
-- 110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor International
Rev. A, September 2000
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9
0.8
-100
※ Notes :
1. VGS = 0 V
2. ID = 250 μA
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 7. Breakdown Voltage Variation
vs Temperature
Operation in This Area
101 is Limited by R DS(on)
100μs10μs
1 ms
100 10 ms
DC
10-1
10-2
100
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
101 102
VDS, Drain-Source Voltage [V]
103
Figure 9. Maximum Safe Operating Area
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-100
※ Notes :
1. VGS = 10 V
2. ID = 1.2 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs Temperature
2.0
1.6
1.2
0.8
0.4
0.0
25 50 75 100 125 150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs Case Temperature
D = 0.5
100
0 .2
1 0 -1
0 .1
0 .05
0 .02
0 .01
sin g le p u ls e
※ N o tes :
1.
Z
θ
(t)
JC
=
2 .5
℃ /W
M ax.
2 . D uty F acto r, D = t /t
12
3.
T
JM
-
T
C
=
P
DM
*
Z
θ
(t)
JC
PDM
t1
t2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
101
©2000 Fairchild Semiconductor International
Rev. A, September 2000
4페이지 Package Dimensions
(0.50)
6.60 ±0.20
5.34 ±0.30
(4.34)
DPAK
(0.50)
2.30 ±0.10
0.50 ±0.10
MAX0.96
2.30TYP
[2.30±0.20]
0.76 ±0.10
2.30TYP
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
(2XR0.25)
©2000 Fairchild Semiconductor International
0.76 ±0.10
Rev. A, September 2000
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부품번호 | 상세설명 및 기능 | 제조사 |
FQU2N80 | 800V N-Channel MOSFET | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |