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부품번호 DM74123N 기능
기능 Dual Retriggerable One-Shot with Clear and Complementary Outputs
제조업체 National Semiconductor
로고 National Semiconductor 로고


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DM74123N 데이터시트, 핀배열, 회로
March 1993
DM54123 DM74123 Dual Retriggerable One-Shot with
Clear and Complementary Outputs
General Description
The ’123 is a dual retriggerable monostable multivibrator
capable of generating output pulses from a few nano-sec-
onds to extremely long duration up to 100% duty cycle
Each device has three inputs permitting the choice of either
leading-edge or trailing edge triggering Pin (A) is an active-
low transition trigger input and pin (B) is an active-high tran-
sition trigger input A low at the clear (CLR) input terminates
the output pulse which also inhibits triggering An internal
connection from CLR to the input gate makes it possible to
trigger the circuit by a positive-going signal on CLR as
shown in the truth table
To obtain the best and trouble free operation from this de-
vice please read the operating rules as well as the NSC
one – shot application notes carefully and observe recom-
mendations
Features
Y DC triggered from active-high transition or active-low
transition inputs
Y Retriggerable to 100% duty cycle
Y Direct reset terminates output pulse
Y Compensated for VCC and temperature variations
Y DTL TTL compatible
Y Input clamp diodes
Functional Description
The basic output pulse width is determined by selection of
an external resistor (RX) and capacitor (CX) Once triggered
the basic pulse width may be extended by retriggering the
gated active-low transition or active-high transition inputs or
be reduced by use of the active-low transition clear input
Retriggering to 100% duty cycle is possible by application of
an input pulse train whose cycle time is shorter than the
output cycle time such that a continuous ‘‘HIGH’’ logic state
is maintained at the ‘‘Q’’ output
Connection Diagram
Dual-In-Line Package
Triggering Truth Table
Inputs
Response
A B CLR
XX
KL
KH
L No Trigger
X No Trigger
H Trigger
H L X No Trigger
L L H Trigger
L H L Trigger
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
TL F 6539 – 1
Order Number DM54123J-MIL DM54123W-MIL or DM74123N
See NS Package Number J16A N16A or W16A
C1995 National Semiconductor Corporation TL F 6539
RRD-B30M105 Printed in U S A




DM74123N pdf, 반도체, 판매, 대치품
Operating Rules (Continued)
6 The retriggerable pulse width is calculated as shown be-
low
T e TW a tPLH e Kc RX c CX a tPLH
The retriggered pulse width is equal to the pulse width
plus a delay time period (Figure 4)
FIGURE 4
TL F 6539 – 6
7 Under any operating condition CX and RX must be kept
as close to the one-shot device pins as possible to mini-
mize stray capacitance to reduce noise pick-up and to
reduce I c R and Ldi dt voltage developed along their
connecting paths If the lead length from CX to pins (6)
and (7) or pins (14) and (15) is greater than 3 cm for
example the output pulse width might be quite different
from values predicted from the appropriate equations A
non-inductive and low capacitive path is necessary to en-
sure complete discharge of CX in each cycle of its opera-
tion so that the output pulse width will be accurate
8 VCC and ground wiring should conform to good high-fre-
quency standards and practices so that switching tran-
sients on the VCC and ground return leads do not cause
interaction between one-shots A 0 01 mF to 0 10 mF by-
pass capacitor (disk ceramic or monolithic type) from VCC
to ground is necessary on each device Furthermore the
bypass capacitor should be located as close to the VCC
pin as space permits
For further detailed device characteristics and output performance
please refer to the NSC one-shot application note AN-366
4

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