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DM74LS155N 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 DM74LS155N은 전자 산업 및 응용 분야에서
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부품번호 DM74LS155N 기능
기능 Dual 2-Line to 4-Line Decoders/Demultiplexers
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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DM74LS155N 데이터시트, 핀배열, 회로
August 1986
Revised April 2000
DM74LS155 • DM74LS156
Dual 2-Line to 4-Line Decoders/Demultiplexers
General Description
These TTL circuits feature dual 1-line-to-4-line demultiplex-
ers with individual strobes and common binary-address
inputs in a single 16-pin package. When both sections are
enabled by the strobes, the common address inputs
sequentially select and route associated input data to the
appropriate output of each section. The individual strobes
permit activating or inhibiting each of the 4-bit sections as
desired. Data applied to input C1 is inverted at its outputs
and data applied at C2 is true through its outputs. The
inverter following the C1 data input permits use as a 3-to-8-
line decoder, or 1-to-8-line demultiplexer, without external
gating. Input clamping diodes are provided on these cir-
cuits to minimize transmission-line effects and simplify sys-
tem design.
Features
s Applications:
Dual 2-to-4-line decoder
Dual 1-to-4-line demultiplexer
3-to-8-line decoder
1-to-8-line demultiplexer
s Individual strobes simplify cascading for decoding or
demultiplexing larger words
s Input clamping diodes simplify system design
s Choice of outputs:
Totem-pole (DM74LS155)
Open-collector (DM74LS156)
Ordering Code:
Order Number Package Number
Package Description
DM74LS155M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS155N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74LS156M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS156N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
© 2000 Fairchild Semiconductor Corporation DS006395
www.fairchildsemi.com




DM74LS155N pdf, 반도체, 판매, 대치품
DM74LS156 Recommended Operating Conditions
Symbol
VCC
VIH
VIL
VOH
IOL
TA
Parameter
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Current
Free Air Operating Temperature
Min
4.75
2
Nom
5
0
DM74LS156 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
VI Input Clamp Voltage
VCC = Min, II = −18 mA
ICEX
HIGH Level
VCC = Min, VO = 5.5V
Output Current
VIL = Max, VIH = Min
VOL LOW Level
VCC = Min, IOL = Max
Output Voltage
VIL = Max, VIH = Min
IOL = 4 mA, VCC = Min
II
Input Current @ Max Input Voltage
VCC = Max, VI = 7V
IIH HIGH Level Input Current
VCC = Max, VI = 2.7V
IIL LOW Level Input Current
VCC = Max, VI = 0.4V
ICC Supply Current
VCC = Max (Note 8)
Note 7: All typicals are at VCC = 5V, TA = 25° C.
Note 8: ICC is measured with all outputs OPEN, A, B, and C1 inputs at 4.5V, and C2, G1, and G2 GROUNDED.
Max
Units
5.25
V
V
0.8 V
5.5 V
8 mA
70 °C
Typ
(Note 7)
Max
1.5
100
0.35
0.25
6.1
0.5
0.4
0.1
20
0.36
10
Units
V
µA
V
mA
µA
mA
mA
DM74LS156 Switching Characteristics
at VCC = 5V and TA = 25°C
From (Input)
Symbol
Parameter
To (Output)
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
A, B, C2, G1
or G2 to Y
A, B, C2, G1
or G2 to Y
A or B
to Y
A or B
to Y
C1
to Y
C1
to Y
RL = 2 k
CL = 15 pF
CL = 50 pF
Min Max Min Max
28 53
33 43
28 53
33 43
28 53
34 43
Units
ns
ns
ns
ns
ns
ns
www.fairchildsemi.com
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