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부품번호 | 5962R9581801VJC 기능 |
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기능 | Radiation Hardened 8-Bit Input/Output Port | ||
제조업체 | Intersil Corporation | ||
로고 | |||
HS-82C12RH
March 1996
Radiation Hardened
8-Bit Input/Output Port
Features
• Devices QML Qualified in Accordance with
MIL-PRF-38535
• Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-95818 and Intersil’ QM Plan
- Radiation Hardened CMOS Process
- Total Dose 1 x 105 RAD (Si)
- Transient Upset > 1 x 108 RAD (Si)/s
- Latch-Up Immune EPI-CMOS > 1 x 1012 RAD (Si)/s
• Low Power Dissipation
• High Noise Immunity
• Single Power Supply +5V
• Low Input Load Current
• 8-Bit Data Register and Buffer
• Asynchronous Register Clear
• Service Request Flip-Flop for Interrupt Generation
• Three-State Outputs
• Bus-Compatible with HS-80C85RH CPU
• Electrically Equivalent to Sandia SA3026
• Military Temperature Range -55oC to +125oC
Functional Diagram
DS1
DS2
STB
CLR
MD
CONTROL
AND
DEVICE
SELECT
LOGIC
2
3
SERVICE
REQUEST
F.F.
DI0-7
DATA
LATCH
AND
BUFFER
(8)
DO0-7
Pin Description
PIN
DI0-DI7
DO0-DO7
DS1, DS2
DESCRIPTION
Data In
Data Out
Device Select
INT
Description
MD Mode
The Intersil HS-82C12RH is a radiation hardened 8-bit input/
output port designed for use with the HS-80C85RH radiation
hardened microprocessor. It is manufactured using a self-
aligned, junction-isolated EPI-CMOS process and features
three-state output buffers and device selection and control
logic. A service request flip-flop is included for the
generation and control of interrupts to the microprocessor.
The device can be used in implement many of the peripheral
and input/output functions of a microcomputer system. The
HS-82C12RH is pinout- and function- compatible with
industry-standard 8212 devices.
STB
INT
CLR
Strobe
Interrupt
Clear
Ordering Information
PART NUMBER
5962R9581801QJC
5962R9581801QXC
5962R9581801VJC
5962R9581801VXC
HS1-82C12RH/Sample
HS9-82C12RH/Sample
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
SCREENING LEVEL
MIL-PRF-38535 Level Q
MIL-PRF-38535 Level Q
MIL-PRF-38535 Level V
MIL-PRF-38535 Level V
Sample
Sample
PACKAGE
24 Lead SBDIP
24 Lead Ceramic Flatpack
24 Lead SBDIP
24 Lead Ceramic Flatpack
24 Lead SBDIP
24 Lead Ceramic Flatpack
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
Spec Number 518063
File Number 3041.2
Specifications HS-82C12RH
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Input Capacitance
Output Capacitance
Pulse Width
Data Set Up Time
Data Hold Time
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
MIN MAX
UNITS
CIN VDD = Open, f = 1MHz, All
measurements referenced to
device ground
TA = +25oC
- 8 pF
COUT
VDD = Open, f = 1MHz, All
measurements referenced to
device ground
TA = +25oC
- 8 pF
TPW VDD = 4.75, VIH = 3.75, VIL = 1.0 9, 10, 11 -55oC, +25oC, - 50 ns
+125oC
TSET VDD = 4.75, VIH = 3.75, VIL = 1.0 9, 10, 11 -55oC, +25oC, - 30 ns
+125oC
TH VDD = 4.75, VIH = 3.75, VIL = 1.0 9, 10, 11 -55oC, +25oC, - 40 ns
+125oC
NOTE: The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are
characterized upon initial design release and upon design changes which would affect these characteristics.
TABLE 4. POST 100K RAD ELECTRICAL PERFORMANCE CHARACTERISTICS
NOTE: The Post Irradiation test conditions and limits are the same as those listed in Table 1 and Table 2.
Spec Number 518063
4
4페이지 Logic Diagram
DS1
13
DS2
DEVICE
SELECT
STB
11
CLR
14
MD
2
HS-82C12RH
S
DQ
CQ
SERVICE
REQUEST
FLIP-FLOP
DATA OUT ENABLE
LATCH RESET
DI0
DQ
3 EQ
R
TSB
DI1
DQ
5 EQ
R
TSB
DI2
LATCH CLOCK
7
DQ
EQ
R
TSB
DI3
DQ
9 EQ
R
TSB
DI4
DQ
16 E Q
R
TSB
DI5
DQ
18 E Q
R
TSB
DI6
DQ
20 E Q
R
TSB
DI7
DQ
22 E Q
R
TSB
INT
23
DO0
4
DO1
6
DO2
8
DO3
10
DO4
15
DO5
17
DO6
19
DO7
21
STB
0
1
0
1
0
1
0
1
TRUTH TABLE 1. DATA OUT
MD DS1 • DS2 DATA OUT EQUALS
0 0 High Z State
0 0 High Z State
1 0 Data Latch
1 0 Data Latch
0 1 Data Latch
0 1 Data In
1 1 Data In
1 1 Data In
TRUTH TABLE 2. INT
CLR DS1 • DS2 STB
0 RESET
0
0
100
10
1 1 RESET 0
100
* Internal Service Request Flip-Flop
Q*
0
0
1
0
0
INT
1
1
0
0
1
Spec Number 518063
7
7페이지 | |||
구 성 | 총 8 페이지수 | ||
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5962R9581801VJC | Radiation Hardened 8-Bit Input/Output Port | Intersil Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |