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PDF EL7155 Data sheet ( Hoja de datos )
| Número de pieza | EL7155 | |
| Descripción | High Performance Pin Driver | |
| Fabricantes | Intersil Corporation | |
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DATASHEET
High Performance Pin Driver
EL7155
The EL7155 high performance pin driver with 3-state is suited
to many ATE and level-shifting applications. The 3.5A peak
drive capability makes this part an excellent choice when
driving high capacitance loads.
Output pins OUTH and OUTL are connected to input pins VH and
VL respectively, depending on the status of the IN pin. One of
the output pins is always in tri-state, except when the OE pin is
low, in which case both outputs are in tri-state mode. The
isolation of the output FETs from the power supplies enables
VH and VL to be set independently, enabling level-shifting to be
implemented.
This pin driver has improved performance over existing pin
drivers. It is specifically designed to operate at voltages down
to 0V across the switch elements while maintaining good
speed and ON-resistance characteristics.
Available in an 8 Ld SOIC package, the EL7155 is specified for
operation over the full -40°C to +85°C temperature range.
Features
• Clocking speeds up to 40MHz
• 15ns tr/tf at 2000pF CLOAD
• 0.5ns rise and fall times mismatch
• 0.5ns tON-tOFF prop delay mismatch
• 3.5pF typical input capacitance
• 3.5A peak drive
• Low ON-resistance of 3.5Ω
• High capacitive drive capability
• Operates from 4.5V up to 16.5V
• Pb-free (RoHS compliant)
Applications
• ATE/burn-in testers
• Level shifting
• IGBT drivers
• CCD drivers
OE VH
VS+
IN
GND
LEVEL
SHIFTER
3-STATE
CONTROL
OUTH
OUTL
VL
FIGURE 1. BLOCK DIAGRAM
October 24, 2014
FN7279.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas LLC 2003, 2005-2006, 2014. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
1 page  
EL7155
Typical Performance Curves
1.0 Max TJ = +125°C
0.8
0.6
SO8
0.4
JA = 160°C/W
0.2
0
0 25 50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 2. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.8
HIGH THRESHOLD
1.6
HYSTERESIS
1.4
1.2 LOW THRESHOLD
1.0
5
10
SUPPLY VOLTAGE (V)
15
FIGURE 3. INPUT THRESHOLD vs SUPPLY VOLTAGE, T = 25°C
2.0
1.6
ALL INPUTS = GND
1.2
0.8
0.4 ALL INPUTS = VS+
0
5
10
SUPPLY VOLTAGE (V)
15
FIGURE 4. QUIESCENT SUPPLY CURRENT vs SUPPLY VOLTAGE,
T = +25°C
30
25
20
15 tF
tR
tF
10
5
tR
10
SUPPLY VOLTAGE (V)
FIGURE 6. RISE/FALL TIME vs SUPPLY VOLTAGE
CL = 2000pF, T = +25°C
15
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5
6
5 VOUT - VL
4
3 VOUT - VH
2
1
0
5.0
7.5
10.0
12.5
SUPPLY VOLTAGE (V)
15.0
FIGURE 5. ON-RESISTANCE vs SUPPLY VOLTAGE, IOUT = 200mA,
T = +25°C, VS+ = VH, VL = 0V
20
18
tF
16
14
tR
12
10
-50
0 50 100
TEMPERATURE (°C)
FIGURE 7. RISE/FALL TIME vs TEMPERATURE
CL = 2000PF, VS+ = 15V
150
FN7279.3
October 24, 2014
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet EL7155.PDF ] | |
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