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PDF EL7556BCM-T13 Data sheet ( Hoja de datos )
| Número de pieza | EL7556BCM-T13 | |
| Descripción | Integrated Adjustable 6 Amp Synchronous Switcher | |
| Fabricantes | Elantec Semiconductor | |
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EL7556BC
Integrated Adjustable 6 Amp Synchronous Switcher
Features
• EL7556C/EL7556AC Pin-
compatible
• Improved temperature and voltage
ranges
• 6A continuous load current
• Precision internal 1% reference
• 1.0V to 3.8V output voltage
• Internal power MOSFETs
• >90% efficiency
• Synchronous switching
• Adjustable slope compensation
• Over-temperature indicator
• Pulse-by-pulse current limiting
• Operates up to 1MHz
• 1.5% typical output accuracy
• Adjustable oscillator with sync
• Remote enable/disable
• Intel P54- and P55-compatible
• VCC2DET interface
• Internal soft-start
Applications
• PC motherboards
• Local high power CPU supplies
• 5V to 1.0V DC:DC conversion
• Portable electronics/instruments
• P54 and P55 regulators
• GTL+ Bus power supply
Ordering Information
Part No
EL7556BCM
EL7556BCM-T13
Package
28-Pin SO
28-Pin SO
Tape &
Reel
-
13”
Outline #
MDP0027
MDP0027
General Description
The EL7556BC is an adjustable synchronous DC:DC switching regu-
lator optimized for a 5V input and 1.0V-3.8V output. By combining
integrated NMOS power FETS with a fused-lead package, the
EL7556BC can supply up to 6A continuous output current without the
use of external power devices or discrete heat sinks, thereby minimiz-
ing design effort and overall system cost.
On-chip resistorless current sensing is used to achieve stable, highly
efficient, current-mode control. The EL7556BC also incorporates the
VCC2DET function to directly interface with the Intel P54 and P55
microprocessors. Depending on the state of VCC2DET, the output
voltage is internally preset to 3.5V or a user-adjustable voltage using
two external resistors. In both internal and external feedback modes
the active-high PWRGD output indicates when the regulator output is
within ±10% of the programmed voltage. An on-board sensor moni-
tors die temperature (OT) for over-temperature conditions and can be
connected directly to OUTEN to provide automatic thermal shutdown.
Adjustable oscillator frequency and slope compensation allow added
flexibility in overall system design.
The EL7556BC is available in a 28-pin SO package and is specified
for operation over the full -40°C to +85°C temperature range.
Connection Diagram
R4
100Ω
R3
150Ω
VIN
D3
C4 0.1µF
C7 39pF
C8 220pF
R5
5.1Ω
1 FB1
FB2 28
2 CREF
CP 27
3 CSLOPE C2V 26
4 COSC VSS 25
5 VDD
VHI 24
6 VIN
LX 23
7 VSSP
LX 22
C5
R1 1µF
20Ω
R6
D2 D4*
(Optional)
D1 C11
0.22µF
C 6 39.2Ω
0.1µF
C9
VIN
660µF
C12
1µF
C3
1µF
8 VIN
LX 21
9 VSSP
LX 20
10 VSSP VSSP 19
11 VSSP VSSP 18
L1 2.5µH
C10
1mF
Connect to VSSP for
external feedback
12 VSSP TEST 17
13
VCC2DET
PWRGD
16
14 OUTEN
OT 15
EL7556BC
C12 - 1µF
C3, C4, C5, C6, C7 C8 - ceramic
C5, C11 - ceramic or tantalum
C9 - Sprague 293D337X96R3 2X330µF
C10 - Sprague 293D337X96R3 3X330µF
L1 - Pulse Engineering, PE-53681
D1-D4: BAT54S fast diode
D4 Required for EL7556ACM Only
Manufactured under U.S. Patents No. 5,723,974 and No. 5,793,126
VOUT =
1V*(1+R3/R4)
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a “controlled document”. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
© 2001 Elantec Semiconductor, Inc.
1 page  
EL7556BC
Integrated Adjustable 6 Amp Synchronous Switcher
Typical Performance Curves
Line Regulation vs CSLOPE
VIN=VDD=5.0V ±10%
0.8
0.7
0.6
0.5
0.4 IOUT=6A
0.3
0.2 IOUT=0.5A
0.1
0.0
50
75 100 125
CSLOPE (pF)
TA=25°C
150 175
VOUT vs CSLOPE
(VIN=5.0V, ILOAD=0.5A)
1.5
1.0
0.5
0.0 VOUT=1V
-0.5
VOUT=2.5V
-1.0 VOUT=3.5V
-1.5
-2.0
-2.5
-3.0
50
TA=25°C
75 100 125 150
CSLOPE (pF)
175
FOSC vs COSC
1000
1000
TA=25°C
100
10
1
10 100 1k 100k
COSC (pF)
Load Regulation vs CSLOPE
IOUT=3A, +3A, -2.5A
0.8
0.7
0.6
0.5
0.4 VIN=4.5V
0.3
0.2 VIN=5V
VIN=5.5V
0.1
0.0
50
75 100 125
CSLOPE (pF)
TA=25°C
150 175
VOUT Variation vs Programmed Output
Voltage [VIDEAL=(1+R3/R4)]
1.5
1.0
0.5
0.0
COCSSCL=O2P2E0=p1F00pF
-0.5
-1.0
Loop Gain Induced Error
-1.5
1.0 1.5 2.0 2.5
VIDEAL (V)
3.0
TA=25°C
3.5 4.0
FOSC vs Temperature
520
510 VDD=4.5V
500
490 VDD=5.5V
480
470 VDD=5V
460
450
0
20 40 60 80 100 120 140
Temperature (°C)
5
5 Page 
EL7556BC
Integrated Adjustable 6 Amp Synchronous Switcher
parator will terminate the high-side switch. If ILMAX
has not been reached, the regulator output voltage is then
compared to the reference voltage VREF. The resultant
error voltage is summed with the current feedback and
slope compensation ramp. The high-side switch remains
on until all three comparator inputs have summed to
zero, at which time the high-side switch is turned off and
the low-side switch is turned on. In order to eliminate
cross-conduction of the high-side and low-side switches
a 10ns break-before-make delay is incorporated in the
switch driver circuitry. In the continuous mode of opera-
tion the low-side switch will remain on until the end of
the oscillator period. In order to improve the low current
efficiency of the EL7556BC, a zero-crossing comparator
senses when the inductor transitions through zero. Turn-
ing off the low-side switch at zero inductor current
prevents forward conduction through the internal clamp-
ing diodes (LX to VSSP) when the low-side switch turns
off, reducing power dissipation. The output enable
(OUTEN) input allows the regulator output to be dis-
abled by an external logic control signal.
Output Voltage Mode Select
The VCC2DET multiplexes the FB1 and FB2 pins to the
PWM controller. A logic 1 on VCC2DET selects the
FB2 input and forces the output voltage to the internally
programmed value of 3.50V. A logic zero on VCC2DET
selects FB1 and allows the output to be programmed
from 1.0 to 3.8V. In general:
VOUT
=
1V
×
1
+
RR----34-
×
Volt
However, due to the relatively low open loop gain of the
system, gain errors will occur as the output voltage and
loop-gain are changed. This is shown in the performance
curves. (The output voltage is factory trimmed to mini-
mize error at a 2.50V output). A 2uA pull-up current
from FB1 to VIN forces VOUT to GND in the event that
FB1 is not used and the VCC2DET is inadvertently tog-
gled between the internal and external feedback mode of
operation.
NMOS Power FETS and Drive Circuitry
The EL7556BC integrates low resistance (25mΩ)
NMOS FETS to achieve high efficiency at 6A. Gate
drive for both the high-side and low-side switches is
derived through a charge pump consisting of the CP pin
and external components D1-D3 and C5-C6. The CP
output is a low resistance inverter driven at one-half the
oscillator frequency. This is used in conjunction with
D2-D3 to generate a 7.5V (typical) voltage on the C2V
pin which provides gate drive to the low-side NMOS
switch and associated level shifter. In order to use an
NMOS switch for the high-side drive it is necessary to
drive the gate voltage above the source voltage (LX).
This is accomplished by boot-strapping the VHI pin
above the C2V voltage with capacitor C6 and diode D1.
When the low-side switch is turned on the LX voltage is
close to GND potential and capacitor C6 is charged
through diodes D1-D3 to approximately 6.9V. At the
beginning of the next cycle the high side switch turns on
and the LX pin begins to rise from GND to VDD poten-
tial. As the LX pin rises the positive plate of capacitor
C6 follows and eventually reaches a value of approxi-
mately 11.2V, for VDD=5V. This voltage is then level
shifted and used to drive the gate of the high-side FET,
via the VHI pin.
Reference
A 1% temperature compensated band gap reference is
integrated in the EL7556BC. The external CREF capac-
itor acts as the dominant pole of the amplifier and can be
increased in size to maximize transient noise rejection.
A value of 0.1uF is recommended.
Oscillator
The system clock is generated by an internal relaxation
oscillator with a maximum duty-cycle of approximately
96%. Operating frequency can be adjusted through the
COSC pin or can be driven by an external clock source.
If the oscillator is driven by an external source, care
must be taken in the selection of CSLOPE. Since the
COSC and CSLOPE values determine the open loop
gain of the system, changes to COSC require corre-
sponding changes to CSLOPE in order to maintain a
constant gain ratio. The recommended ratio of COSC to
CSLOPE is 1.5:1
Temperature Sensor
An internal temperature sensor continuously monitors
die temperature. In the event that die temperature
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet EL7556BCM-T13.PDF ] | |
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