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EM658160TS-6 데이터시트 PDF




Etron Technology Inc.에서 제조한 전자 부품 EM658160TS-6은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 EM658160TS-6 자료 제공

부품번호 EM658160TS-6 기능
기능 4M x 16 DDR Synchronous DRAM (SDRAM)
제조업체 Etron Technology Inc.
로고 Etron Technology  Inc. 로고


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EM658160TS-6 데이터시트, 핀배열, 회로
Et r onT ec h
EM658160
Etron Confidential
4M x 16 DDR Synchronous DRAM (SDRAM)
(Rev. 1.1 Jan./2002)
Features
Pin Assignment (Top View)
Fast clock rate: 300/285/250/200/166/143/125MHz
Differential Clock CK & /CK
Bi-directional DQS
DLL enable/disable by EMRS
Fully synchronous operation
Internal pipeline architecture
Four internal banks, 1M x 16-bit for each bank
Programmable Mode and Extended Mode registers
- /CAS Latency: 2, 2.5, 3
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleaved
Individual byte write mask control
DM Write Latency = 0
Auto Refresh and Self Refresh
4096 refresh cycles / 64ms
Precharge & active power down
Power supplies: VDD = 3.3V ± 0.3V
VDDQ = 2.5V ± 0.2V
Interface: SSTL_2 I/O Interface
Package: 66 Pin TSOP II, 0.65mm pin pitch
Ordering Information
Part Number
EM658160TS-3.3
EM658160TS-3.5
EM658160TS-4
EM658160TS-5
EM658160TS-6
EM658160TS-7
EM658160TS-8
Frequency
300MHz
285MHz
250MHz
200MHz
166MHz
143MHz
125MHz
Package
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
NC
LDM
/WE
/CAS
/RAS
/CS
NC
BS0
BS1
A10/AP
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
66 VSS
65 DQ15
64 VSSQ
63 DQ14
62 DQ13
61 VDDQ
60 DQ12
59 DQ11
58 VSSQ
57 DQ10
56 DQ9
55 VDDQ
54 DQ8
53 NC
52 VSSQ
51 UDQS
50 NC
49 VREF
48 VSS
47 UDM
46 /CK
45 CK
44 CKE
43 NC
42 NC
41 A11
40 A9
39 A8
38 A7
37 A6
36 A5
35 A4
34 VSS
Overview
The EM658160 SDRAM is a high-speed CMOS
double data rate synchronous DRAM containing 64
Mbits. It is internally configured as a quad 1M x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal, CK).
Data outputs occur at both rising edges of CK and /CK.
Read and write accesses to the SDRAM are burst
oriented; accesses start at a selected location and
continue for a programmed number of locations in a
programmed sequence. Accesses begin with the
registration of a BankActivate command which is then
followed by a Read or Write command. The EM658160
provides programmable Read or Write burst lengths of 2,
4, 8, full page.
An auto precharge function may be enabled to
provide a self-timed row precharge that is initiated at the
end of the burst sequence. The refresh functions, either
Auto or Self Refresh are easy to use. In addition,
EM658160 features programmable DLL option. By
having a programmable mode register and extended
mode register, the system can choose the most suitable
modes to maximize its performance. These devices are
well suited for applications requiring high memory
bandwidth, result in a device particularly well suited to
high performance main memory and graphics
applications.
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345 FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.




EM658160TS-6 pdf, 반도체, 판매, 대치품
Et r onT ec h
4Mx16 DDR SDRAM
EM658160
VDD
VSS
VDDQ
VSSQ
VREF
NC
Supply Power Supply: +3.3V ±0.3V
Supply Ground
Supply DQ Power: +2.5V ±0.2V. Provide isolated power to DQs for improved noise immunity.
Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity.
Supply Reference Voltage for Inputs: +0.5*VDDQ
- No Connect: These pins should be left unconnected.
Etron Confidential
4
Rev. 1.1
Jan. 2002

4페이지










EM658160TS-6 전자부품, 판매, 대치품
Et r onT ec h
4Mx16 DDR SDRAM
EM658160
CAS Latency Field (A6~A4)
This field specifies the number of clock cycles from the assertion of the Read command to the
first read data. The minimum whole value of CAS Latency depends on the frequency of CK.
The minimum whole value satisfying the following formula must be programmed into this field.
tCAC(min) CAS Latency X tCK
A6 A5 A4
CAS Latency
000
Reserved
010
2 clocks
011
3 clocks
101
Reserved
110
2.5 clocks
1 1 1 Reserved (3.5 clocks)
Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal
operation.
A8 A7
00
10
X1
( BS0, BS1)
Test Mode
Normal mode
DLL Reset
Test mode
BS1
RFU
RFU
BS0
0
1
An ~ A0
MRS Cycle
Extended Functions (EMRS)
Extended Mode Register Set (EMRS)
BS1
RFU
RFU
BS0 A11~ A1
1 RFU
1 RFU
A0
0
1
DLL Enable
DLL Disable
Etron Confidential
7
Rev. 1.1
Jan. 2002

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