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EM73A83 데이터시트 PDF




ELAN Microelectronics Corp에서 제조한 전자 부품 EM73A83은 전자 산업 및 응용 분야에서
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부품번호 EM73A83 기능
기능 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
제조업체 ELAN Microelectronics Corp
로고 ELAN Microelectronics Corp 로고


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EM73A83 데이터시트, 핀배열, 회로
GENERAL DESCRIPTION
EM73A83
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
EM73A83 is an advanced single chip CMOS 4-bit micro-controller. It contains 16K-byte ROM, 500-nibble
RAM, 4-bit ALU, 13-level subroutine nesting, 22-stage time base, two 12-bit timer/counters for the kernel
function. EM73A83 also equipped with 6 interrupt sources, 3 I/O ports (including 1 input port and 2 bidirection
ports), LCD display (40x16), built-in sound generator and speech synthesizer.
It's low power consumption and high speed feature are further strengten with DUAL, SLOW, IDLE and STOP
operation mode for optimized power saving.
FEATURES
• Operation voltage
: 2.2V to 4.8V.
• Clock source
: Dual clock system. Low-frequency oscillator is 32 KHz Crystal oscillator or RC
oscillator by mask option and high-frequency oscillator is a built-in internal
oscillator (4.6 MHz).
• Instruction set
: 107 powerful instructions.
• Instruction cycle time : 1.7µs for 4.6M Hz (high speed clock).
244µs for 32768 Hz (low speed clock).
• ROM capacity
: 16K x 8 bits.
• RAM capacity
: 500 x 4 bits.
• Input port
: 1 port (P0.0-P0.3), IDLE/STOP releasing function is available by mask option.
(each input pin has a pull-up and pull-down resistor available by mask option).
• Bidrection port
: 2 ports (P4, P8). IDLE/STOP release function for P8(0..3) is available by mask
option.
• Built-in watch-dog-timer counter : It is available by mask option.
• 12-bit timer/counter : Two 12-bit timer/counters are programmable for timer, event counter and pulse
width measurement mode.
• Built-in time base counter : 22 stages.
• Subroutine nesting
: Up to 13 levels.
• Interrupt
: External interrupt . . . . . . 2 input interrupt sources.
Internal interrupt . . . . . . 2 timer overflow interrupts, 1 time base interrupt.
1 speech interrupt.
• LCD driver
: 40x16 dots, 1/16 duty, 1/5 bias with voltage multiplier.
• Sound effect
: Tone generator and random generator.
• Speech synthesizer
: 160K speech data ROM (use as 160K nibbles data ROM).
• Power saving function : SLOW, IDLE, STOP operation modes.
• Package type
: Chip form 85 pins.
* This specification are subject to be changed without notice.
10.31.2000 1




EM73A83 pdf, 반도체, 판매, 대치품
EM73A83
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
User's program and fixed data are stored in the program ROM. User's program is executed using the PC value
to fetch an instruction code.
The 16Kx8 bits program ROM can be divided into 4 banks. There are 4Kx8 bits per bank.
The program ROM bank is selected by P3(1..0). The program counter is a 13-bit binary counter. The PC
and P3 are initialized to "0" during reset.
When P3(1..0)=00B, the bank0 and bank1 of program ROM will be selected. P3(1..0)=01B, the bank0 and
bank2 will be selected.
Address
0000h
:
:
0FFFh
1000h
:
:
1FFFh
P3=xx00B
Bank0
P3=xx01B
Bank0
P3=xx10B
Bank0
Bank1
Bank2
Bank3
PROGRAM EXAMPLE :
BANK 0
START: :
:
:
LDIA #00H
; set program ROM to bank1
OUTA P3
B XA1
:
XA :
:
:
LDIA #01H
; set program ROM to bank2
OUTA P3
B XB1
:
XB : :
:
LDIA #02H
; set program ROM to bank3
OUTA P3
B XC1
:
XC : :
:
B XD
XD :
:
:
:
;--------------- -------------------- -------------------- -------------------- --
BANK 1
XA1 :
:
:
B XA
:
XA2 :
:
* This specification are subject to be changed without notice.
10.31.2000 4

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EM73A83 전자부품, 판매, 대치품
EM73A83
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
The bank is selected by P9.3. When P9.3 is cleared to "0", the bank 0 is selected. When P9.3 is set to "1", the bank
1 is selected.
The Data Memory consists of three Address mode, namely -
(1) Indirect addressing mode:
The address in the bank is specified by the HL registers.
P9.3 HR LR
RAM address
PROGRAM EXAMPLE: Load the data of RAM address "143h" to RAM address "032h".
SEP P9,3 ; P9.31
LDL #3h ; LR3
LDH #4h ; HR4
LDAM ; AccRAM[134h]
CLP P9,3 ; P9.3← 0
LDL #2h ; LR2
LDH #3h ; HR3
STAM ; RAM[023h]Acc
(2) Direct addressing mode:
The address in the bank is directly specified by 8 bits code of the second byte in the instruction field.
instruction field
xxxx xxxx
P9.3
RAM address
xxxx xxxx
PROGRAM EXAMPLE: Load the data of RAM address "143h" to RAM address "023h".
SEP P9,3 ; P9.31
LDA 43h ; AccRAM[143h]
CLP P9,3 ; P9.3← 0
STA 23h ; RAM[023h]Acc
(3) Zero-page addressing mode:
The zero-page is in the bank 0 (address 000h~00Fh). The address is the lower 4 bits code of the second byte
in the instruction field.
instruction field
yyyy
RAM address 0 0000 yyyy
PROGRAM EXAMPLE: Write immediate "0Fh" to RAM address "005h".
STD #0Fh, 05h ; RAM[05h]0Fh
* This specification are subject to be changed without notice.
10.31.2000 7

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