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PDF EM73P362 Data sheet ( Hoja de datos )
| Número de pieza | EM73P362 | |
| Descripción | 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT | |
| Fabricantes | ELAN Microelectronics Corp | |
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EM73P362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
GENERAL DESCRIPTION
EM73P362 is an advanced single chip CMOS 4-bit one-time-programmable (OTP) micro-controller. It contains
3K-byte ROM, 52-nibble RAM, 4-bit ALU, 13-level subroutine nesting, 22-stage time base, one 12-bit timer for
the kernal function and one high speed counter. EM73P362 also contains 5 interrupt sources, 1 input port, 4
bidirection ports, built-in watch-dog-timer and LCD driver (27x3 to 15x3).
Except low-power consumption and high speed, EM73P362 has the STOP mode and IDLE mode operation for
power saving function.
FEATURES
• Operation voltage
: 1.3V to 1.8V. (clock frequency : 32K Hz)
• Clock source
: Single clock system for crystal, connect a external resistor or external clock
source, available by mask option.
• Instruction set
: 109 powerful instructions.
• Instruction cycle time : Up to 122µs for 32 K Hz.
• ROM capacity
: 3072 x 8 bits.
• RAM capacity
: 52 x 4 bits.
• Input port
: 1 port (4-bit).
• Bidirection port
: 4 ports (P4, P6, P7, P8) are available by mask option. P4 is a high current port.
(P4.0 and TONE available by mask option. P4.1~P4.3 are shared with the input/
output of RFO.) P6, P7 and P8 are shared with SEG15-SEG26.
• 12-bit timer
: One 12-bit timer is programmable for timer.
• High speed counter
: The high speed counter includes one 8-bit high speed counter, one 12-bit general
counter and a resistor frequency oscillator. It has resistor to frequency oscillation
mode, melody mode and auto load timer mode.
• Built-in time base counter: 22 stages.
• Subrountine nesting
: Up to 13 levels.
• Interrupt
: External interrupt . . . . . . 2 input interrupt sources.
Internal interrupt . . . . . . 2 timer overflow interrupts,
1 time base interrupt.
• LCD driver
: 27x3 to 15x3 dots available by mask option. 1/3, 1/2 and static three kinds of duty
(1/2 bias) selectable. The programming method of LCD driver is RAM mapping.
• Built-in watch-dog-timer is available by mask option.
• Built-in low battery detector.
• Power saving function : STOP mode and IDLE mode.
• Package type
: Chip form 50 pins.
QFP 52 pins (CQ).
QFP 100 pins (BQ).
* This specification are subject to be changed without notice.
11.1.2001 1
1 page  
EM73P362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
FUNCTION DESCRIPTIONS
PROGRAM ROM ( 3K X 8 bits )
3 K x 8 bits program ROM contains user's program and some fixed data.
The basic structure of program ROM can be divided into 4 parts.
1. Address 000h: Reset start address.
2. Address 002h - 00Ch : 5 kinds of interrupt service routine entry addresses.
3. Address 00Eh-086h : SCALL subroutine entry address, only available at 00Eh,016h,01Eh,026h, 02Eh,
036h, 03Eh, 046h, 04Eh, 056h, 05Eh, 066h, 06Eh, 076h, 07Eh, 086h.
4. Address 000h - 7FFh : LCALL subroutine entry address.
5. Address 000h - BFFh : Except used as above function, the other region can be used as user's program region.
address
000h
002h
004h
006h
008h
00Ah
00Ch
00Eh
086h
...
BFFh
3072 x 8 bits
Reset start address
INT0; External interrupt service toutine entry address
TRGA; Timer/counter A interrupt service routine entry address
TRGB; Timer/counter B interrupt service routine entry address
TBI; Time base interrupt service routine entry address
INT1; External interrupt service routine entry address
SCALL, subroutine call entry address
User's program and fixed data are stored in the program ROM. User's program is according the PC value
to send next executed instruction code. Fixed data can be read out by table-look-up instruction.
Table-look-up instruction is depended on the Data Pointer (DP) to indicate to ROM address, then to get the
ROM code data.
LDAX
LDAXI
Acc ← ROM[DP]L
Acc ← ROM[DP]H,DP+1
DP is a 12-bit data register which can store the program ROM address to be the pointer for the ROM code data.
First, user load ROM address into DP by instruction "STADPL, STADPM, STADPH", then user can get the
lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction "LDAXI".
* This specification are subject to be changed without notice.
11.1.2001 5
5 Page 
EM73P362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
be "0", it means a borrow out, otherwise, if the result is positive, CF will be "1". For ZF, if the result
of subtraction operation is "0", the ZF will be "1", otherwise, ZF will be "1".
EXAMPLE:
Operation
8-4=4
7-F= -8(1000)
9-9=0
Carry
1
0
1
Zero
0
0
1
(3) Rotation:
There are two kinds of rotation operation, one is rotation left, the other is rotation right.
RLCA instruction rotates Acc value to left, shift the CF value into the LSB bit of Acc and the shift out data
will be hold in CF.
MSB LSB
ACC
CF
RRCA instruction operation rotates Acc value to right, shift the CF value into the MSB bit of Acc and
the shift out data will be hold in CF.
MSB LSB
ACC
CF
PROGRAM EXAMPLE: To rotate Acc right and shift a "1" into the MSB bit of Acc.
TTCFS; CF ← 1
RRCA; rotate Acc right and shift CF=1 into MSB.
HL REGISTER
HL register are two 4-bit registers, they are used as a pair of pointer for the address of RAM memory and also
2 independent temporary 4-bit data registers. For some instruction, L register can be a pointer to indicate the
pin number (Port4, Port6, Port7).
HL REGISTER STRUCTURE
3210 3210
H REGISTER L REGISTER
HL REGISTER FUNCTION
(1) For instruction : LDL #k, LDH #k, THA, THL, INCL, DECL, EXAL, EXAH, HL register used as a
temporary register.
PROGRAM EXAMPLE: Load immediate data "5h" into L register, "Dh" into H register.
LDL #05h;
LDH #0Dh;
(2) For instruction LDAM, STAM, STAMI .., HL register used as a pointer for the address of RAM memory.
* This specification are subject to be changed without notice.
11.1.2001 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM73P362.PDF ] | |
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